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DSP-FPGA Based Image Processing System Final Presentation

DSP-FPGA Based Image Processing System Final Presentation. Jessica Baxter  Sam Clanton Simon Fung-Kee-Fung Almaaz Karachi  Doug Keen. Computer Integrated Surgery II May 3, 2001. Plan of Action. Project Description Implementation Overview Significance Results Future Directions.

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DSP-FPGA Based Image Processing System Final Presentation

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  1. DSP-FPGA Based Image Processing SystemFinal Presentation Jessica Baxter  Sam Clanton Simon Fung-Kee-Fung Almaaz Karachi  Doug Keen Computer Integrated Surgery II May 3, 2001

  2. Plan of Action • Project Description • Implementation Overview • Significance • Results • Future Directions

  3. Project Overview • Objective: To develop a robust image processing system using adaptive edge detection, taking advantage of a DSP and FPGA hardware implementation to increase speed. • Deliverables • Minimum: Adaptive Edge Detection Software • Expected: Software Implemented in Hardware, Handling of Static Images • Maximum: Real-time Handling of Input

  4. Purpose • Gain a better understanding of Genetic Algorithms for use in DSPs and FPGAs. • To develop a robust image processing system using adaptive edge detection, taking advantage of DSP and FPGA hardware • Edge Detection Optimization Software • Adaptive Edge Detection Software Implemented in Hardware, Handling of Static Image • Real-time Processing of Live Input

  5. Plan of Action • Project Description • Implementation Overview • Significance • Results • Future Directions

  6. GA Method for Adaptive Image Segmentation System: Software Side • Input image • Compute image statistics. • Segment the image using initial parameters. • Compute the segmentation quality measures • WHILE not <stop conditions> DO • Select individuals using the reproduction operator • Generate new population using the crossover and mutation operators • Segment the image using new parameters • Compute the segmentation quality measures END • Update the knowledge base using the new knowledge structure Figure: Bhanu, Lee

  7. Hardware Assignment • DSP’s serve as the main processor and FPGA’s provide support as co-processors. • The genetic algorithm (GA) is included in the DSP. • FPGA’s compute the image statistics and the segmentation of quality measure.

  8. Functional Break-Up: • DSP: • Initiation of Genetic Algorithm • Optimization • Join – calls vector graphic file to align segmented pieces FPGA: • Image Acquisition • Basic Image Processing (ex. Brightness) • Image Analysis – choosing and calculating statistical parameters • Segmentation – background extraction • Evaluation of Metrics of Population Fitness • CRT: • Output (including values of statistical evaluation parameters)

  9. Plan of Action • Project Description • Implementation Overview • Significance • Results • Future Directions

  10. Significance • Leads to increases in • Reliability • Adaptability • Performance • Medical technology: • Demands: • High reliability and performance • Leads to • Development of failsafe, precise sensor systems for computer-integrated surgical applications • Retinal Applications

  11. Plan of Action • Project Description • Implementation Overview • Significance • Results • Future Directions

  12. Demonstration Genetic Algorithm

  13. Background Extraction • Extract background from input image to isolate areas that contain useful information • Use algorithm presented in: • Rodriguez, Arturo A., Mitchell, O. Robert. “Robust statistical method for background extraction in image segmentation” Stochastic and Neural Methods in Signal Processing, Image Processing, and Computer Vision. Vol. 1569, 1991 • Output to evaluation module

  14. Original Image

  15. Image After Preprocessing Results

  16. Background Extraction Output

  17. Processed Output

  18. Extracted Image

  19. Another Example

  20. Plan of Action • Project Description • Implementation Overview • Significance • Results • Future Directions

  21. Work to date • Developed a first draft of an edge detection optimization algorithm • Developed C and Matlab coding modules to be used for direct mapping into TI C67 DSP and Xilinx Virtex FPGA

  22. Future Directions • Integrate with image capture device - Important for reaching the maximum goal of real-time visual processing • CRT: Output (including values of statistical evaluation parameters) • Integrate code into Xilinx and TI parts • Further develop ideas for potential collaboration with JHU Wilmer Eye Institute

  23. Acknowledgments • Dr. Charles Johnson-Bey • Co- Researchers – Morgan State Student - Nykia Jackson

  24. Questions

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