1 / 40

On Rewiring and Simplification for Canonicity in Threshold Logic Circuits

Chun-Yao Wang ( 王俊堯 ) 2011/12/16. On Rewiring and Simplification for Canonicity in Threshold Logic Circuits. Department of Computer Science, National Tsing Hua University Hsinchu , Taiwan, R.O.C. Outline. Introduction Rewiring Simplification Experimental results Conclusion. Outline.

kaleb
Download Presentation

On Rewiring and Simplification for Canonicity in Threshold Logic Circuits

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Chun-Yao Wang (王俊堯) 2011/12/16 On Rewiring and Simplification for Canonicity in Threshold Logic Circuits Department of Computer Science, National TsingHua University Hsinchu, Taiwan, R.O.C.

  2. Outline • Introduction • Rewiring • Simplification • Experimental results • Conclusion Department of Computer Science, National TsingHua University, Taiwan, R.O.C.

  3. Outline • Introduction • Rewiring • Simplification • Experimental results • Conclusion Department of Computer Science, National TsingHua University, Taiwan, R.O.C.

  4. Threshold Logic • A linear threshold gate (LTG) is an n binary input and one binary output function: x1 x2 xn w1 w2 wn T • f = 1 if • 0if f … … n binary inputs x1, x2, … ,xn with weights w1, w2, … ,wn a single binary output f a threshold value T x1 x2 x3 2 f 1 1 2 x1 x2 f x3 Threshold logic gate Department of Computer Science, National TsingHua University, Taiwan, R.O.C.

  5. Threshold Logic (cont.) • In comparison to Boolean logic, threshold logic representation has a shorter depth and less nodes in a network. • Threshold logic network v.s. Boolean logic network. 5 nodes and 3 levels 6 nodes and 4 levels Department of Computer Science, National TsingHua University, Taiwan, R.O.C.

  6. Assumptions • A threshold logic network is generated by an ILP-based approach [1]. • Each LTG can be expressed in a canonical form which has the minimal summationof weights and threshold values. • The weights and threshold value of a threshold function are positive integers [2]. x1 x2 x3 x1 x2 x3 1 f 2 f 2 1 -1 2 1 1 y3 = x3’ [1] R. O. Winder, “Threshold Logic.” Ph.D. dissertation, Princeton University, Princeton, NJ,1962. [2] S. Muroga, “Threshold Logic and its Applications”. New York, NY: John Wiley, 1971. Department of Computer Science, National TsingHua University, Taiwan, R.O.C.

  7. Outline • Introduction • Rewiring • Simplification • Experimental results • Conclusion Department of Computer Science, National TsingHua University, Taiwan, R.O.C.

  8. Problem Formulation • Given: • A threshold network. • An irredundant target wire. • Objective: • To rectify the changed functionality of the original threshold network due to the target wire removal by adding threshold logic gates at other locations. Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.

  9. Features • Rewire any target wire in a threshold network without changing its functionality. • It only depends on the information of the inputs and weights and the threshold value in each LTG. Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.

  10. Application • Synthesis and optimization • Generate a threshold network with a new fanin number constraint instead of resynthesizing. Department of Computer Science, National TsingHua University, Taiwan, R.O.C.

  11. START Rewiring Flow Input: A threshold network and a target wire Grouping and decomposition Target wire removal The target wire is critical? No Yes Rectify at the transitive fanout cone? No Case 3 Yes Case 1 Case 2 • Rectification • Threshold value change • Rectification network constructionat each input • AND connection • Rectification • The useless input removal • Rectification network construction • OR connection • Rectification • Threshold value change • Rectification network construction • AND connection Simplification Output: The synthesized threshold network END Department of Computer Science, National TsingHua University, Taiwan, R.O.C.

  12. Input Grouping and Gate Decomposition • Objective: To separate the inputs and the corresponding weights into different groups. • Step 1: Separate an input whose weight is equal to the threshold value of the objective gate as a single group. • Step 2: Separate the remaining inputs as another group. • Each group can be extracted as a new decomposition gate. • We then group-wise treat the inputs of an LTG after this grouping process. The decomposition gate a b c 3 1 1 1 d a b c d 1 1 1 3 3 f 3 f 3 3 Department of Computer Science, National TsingHua University, Taiwan, R.O.C.

  13. Useless Threshold Logic Gate • Definition 1: A single group LTG is useless if and only if it is an empty gate or it outputs zero for all input combinations. • Theorem 1: Given a nonempty LTG, it is useless if and only if it satisfies the following equation, where n is the number of inputs in this gate. The threshold logic gate is useless because it outputs zero for all input combinations. a b c 4 f 1 1 1 Department of Computer Science, National TsingHua University, Taiwan, R.O.C.

  14. Critical Input • Definition 2: An input in a single group LTG is critical if and only if this LTG will become useless after removing this input. • Theorem 2: Given a single group LTG, an input xj with its corresponding weight wj is critical if and only if it satisfies the following equation, where n is the number of inputs in this gate. The gate will become useless after removing a => input a is critical. a b c 3 f 2 1 1 Department of Computer Science, National TsingHua University, Taiwan, R.O.C.

  15. Useless Input • Definition 3: An input is useless if and only if the output of this LTG is intact when this input toggles under all input combinations. • Theorem 3: Given an input xj with its corresponding weight wj, xj is useless if and only if it satisfies either EQ(A) or EQ(B) for each input combination, where n is the number of inputs in this gate. The output is intact when input c toggles for all input combinations => Input c is useless a b c 5 f 3 2 1 (A) and (B) and Department of Computer Science, National TsingHua University, Taiwan, R.O.C.

  16. START Target Wire Removal Input: A threshold network and a target wire Grouping and decomposition • Remove the target wire and its corresponding weight from the objective gate directly. • Two possible results. • A normal threshold logic gate. • A useless threshold logic gate. Target wire removal The target wire is critical? No Yes Rectify at the transitive fanout cone? No Case 3 Yes Case 1 Case 2 • Rectification • Threshold value change • Rectification network constructionat each input • AND connection • Rectification • The useless input removal • Rectification network construction • OR connection • Rectification • Threshold value change • Rectification network construction • AND connection Simplification Output: The synthesized threshold network END Department of Computer Science, National TsingHua University, Taiwan, R.O.C.

  17. Critical-Effect • Definition 4: A single group LTG has a critical-effect if and only if there exists an assignment such that the output changes from 1 to 0 when each one of its inputs in this assignment changes from 1 to 0. • A vector where an LTG has a critical-effect is called a critical-effect vector. • Theorem 4: Given a single group LTG, the LTG has a critical-effect if it satisfies the following equation, where n is the number of inputs in this gate. a b c d 3 2 1 1 f 5 Department of Computer Science, National TsingHua University, Taiwan, R.O.C.

  18. Rectification Network Construction • Case 1: The target wire is not critical: • The remaining objective gate will not become useless. • Keep the threshold value intact. • Analyze the functionality among all inputs of an LTG with critical-effect vectors for the construction of rectification network. Department of Computer Science, National TsingHua University, Taiwan, R.O.C.

  19. Critical-Effect Vector • We use critical-effect vectors to construct the rectification network in our algorithm. • The loss of a subfunction only occurs when removing a target input which is assumed to be 1 in a critical-effect vector. a b c 3 f 2 1 1 Department of Computer Science, National TsingHua University, Taiwan, R.O.C.

  20. Search for the Rectification Network • Given a single group LTG and the target wire xt, the rectification network construction is described as follows: • Step 1: Remove any useless input. • Step 2:Get all critical-effect vectors where xt assumed to be 1. • Step 3: Collect all inputs that are assumed to be 1 in these critical-effect vectors a b c d e d e 3 1 1 4 6 f n1 4 6 10 10 The remaining objective gate The objective gate and the target wire a The critical-effect vectors Inputs a, b and e are found in the critical-effect vector 11001. Inputs a, c and e are found in the critical-effect vector 10101. Department of Computer Science, National TsingHua University, Taiwan, R.O.C.

  21. Search for the Rectification Network(cont.) • Step 4: Get the rectification network by creating a new gate consisting of the inputs found in step 3 with its corresponding weight and threshold value of the objective gate. • Step 5: Connect the remaining objective gate to this rectification network with an OR gate. The remaining objective gate The rectification network d e d e a b c e a b c e n2 n2 n1 f 3 1 1 6 3 1 1 6 4 6 4 6 1 1 n1 10 10 1 10 10 Department of Computer Science, National TsingHua University, Taiwan, R.O.C.

  22. Rectification Network Construction(cont.) • Case 2: The target wire is critical, and we rectify it at the transitive fanout cone: • It will cause a useless gate after the removal. • Given a single group LTG and the target wire xt, the rectification network construction is described as follows: • Step 1: Decrease the threshold value of the remaining objective gate by wt. • Step 2: The rectification network is the target wire only. • Step 3: Connect the remaining objective gate to this rectification network with an AND gate at its transitive fanout cone. a b c d e a b c d a b c d n1 3 1 1 4 6 f f 3 1 1 4 3 1 1 4 1 1 n1 4 4 10 2 e The objective gate and the target wire e. The remaining objective gate Department of Computer Science, National TsingHua University, Taiwan, R.O.C.

  23. Rectification Network Construction (cont.) • Case 3: The target wire is critical, and we rectify it at the transitive fanin cone: • It will cause a useless gate after the removal. • Given a single group LTG and the target wire xt, the rectification network construction is described as follows: • Step 1: Decrease the threshold value of the remaining objective gate by wt. • Step 2: The rectification network is the target wire only. • Step 3: Connect rectification network to each input, respectively, in the remaining objective gate with an AND gate at its transitive fanin cone. Department of Computer Science, National TsingHua University, Taiwan, R.O.C.

  24. Rectification Network Construction (cont.) • Case 3: The target wire is critical, and we rectify it at the transitive fanin cone: The objective gate and the target wire e. a b c d e a b c d n1 3 1 1 4 6 f 3 1 1 4 10 4 d a b c 1 1 1 1 1 1 1 1 2 2 2 2 e e e e The remaining objective gate f 3 1 1 4 4 Department of Computer Science, National TsingHua University, Taiwan, R.O.C.

  25. Outline • Introduction • Rewiring • Simplification • Experimental results • Conclusion Department of Computer Science, National TsingHua University, Taiwan, R.O.C.

  26. Simplification • After the target wire removal and the rectification network construction, the appearances of some LTGs may be changed such that they cannot be canonically represented. • A simplification procedure transforms a single group LTG to its canonical representation. • Minimum positive weights and threshold value. Department of Computer Science, National TsingHua University, Taiwan, R.O.C.

  27. Simplification Flow START Decrease the input weight and the threshold value sequentially Input A given LTG This decrementis valid ? No Divide the LTG by a common divisor Yes Get the critical-effect vectors Update the LTGand divide the LTG by a common divisor There exists an input weight to decrease? Yes No Output The canonical LTG END Department of Computer Science, National TsingHua University, Taiwan, R.O.C.

  28. a b c d a b c d Functional Equivalence 9 8 2 2 3 4 1 1 3 4 f f • Keep the functionality intact while gradually decreasing the input weights and the threshold value. • Checking the functional equivalence after a weight and the threshold value decrement is necessary. • Theorem5: Given two single group LTGs, they are functionally equivalent if and only if they have the same critical-effect vectors. Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.

  29. a b c d a b c d Simplification(cont.) 9 9 2 2 3 4 2 2 3 4 f f • Given a single group LTG, the simplification procedure is described as follows: • Step 1: Ensure that the weights for all inputs and threshold value have no common divisor which is larger than 1. • Step 2: Keep the critical-effect vectors. a b c d 4 4 6 8 f 18 Department of Computer Science, National TsingHua University, Taiwan, R.O.C.

  30. a b c d a b c d a b c d a b c d Simplification (cont.) 8 9 8 9 2 2 3 4 2 2 3 4 1 1 3 4 2 2 3 3 f f f f • Step 3: Iteratively decrease each input weight and the threshold value and then get a updated representation. • If we decrease a unique weight by 1 in an LTG, the threshold value is decreased by 1 as well. • The weights of inputs that have the same weight must be simultaneously decreased. • The corresponding threshold value is decreased by the number of 1 in these same-weight inputs of any critical-effect vector. Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.

  31. Simplification (cont.) • Step 4: Verify if the functionality between the original LTG and the updated LTG intact or not after each weight-decreasing operation. • Step 4-a: If their critical-effect vectors are different, the weight-decreasing operation is invalid. The operation undoes the decrement and then switches the operation tothe other inputs. • Step 4-b: If their critical-effect vectors are identical, this weight-decreasing operation is valid. • Step 5: Terminate the simplification procedure if any weight-decreasing operation is invalid. Or return to step 3. Department of Computer Science, National TsingHua University, Taiwan, R.O.C.

  32. Weight and Threshold Value Decreasing • If an invalid decrementby one on one input occurs, the weight decrement by two onthe same input must be invalid. • Theorem6:Given an n-input(x1~xn) singlegroup LTG with the symmetric inputs xj~xj+mG1(w1,w 2,w 3, …, wj,wj+1,…, w j+m,…, wn-1, wn-1; T),the weight-decreasing operation on xj ~xj+mthat decreases wj~wj+mby d are valid if the weight-decreasing operationon xj~xj+m that decreases wj~wj+m by D is valid,where 0 < d < D. m is zero iff xj is an input with a uniqueweight. a b c d a b c d a b c d 4 4 6 8 2 2 6 8 3 3 6 8 f f f 18 16 17 Original LTG before the weight-decreasing operations Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.

  33. a b c d a b c d a b c d a b c d a b c d a b c d a b c d Simplification (cont.) 7 6 8 3 5 5 9 2 2 3 4 1 1 2 4 1 1 3 4 1 1 1 1 1 1 1 3 1 1 2 3 1 1 2 2 f f f f f f f a b c d 4 4 6 8 f 18 Decrease the weights in inputs a, b Decrease the weight in input c Decrease the weight in input d Decrease the weight in input c Decrease the weight in input d Decrease the weights in inputs c, d Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.

  34. Outline • Introduction • Rewiring • Simplification • Experimental results • Conclusion Department of Computer Science, National TsingHua University, Taiwan, R.O.C.

  35. Experimental Results • The experiments show the logic restructuring capability our rewiring algorithm offers. • We reconstruct a threshold network using our rewiring algorithm. Department of Computer Science, National TsingHua University, Taiwan, R.O.C.

  36. Experimental Results • We demonstrate the efficiency ofour rewiring algorithm for resynthesizing a threshold networkwith different fanin number constraints. [3] R. Zhang, P. Gupta, L. Zhong, and N. K. Jha, “Synthesis and Optimization of ThresholdLogic Networks with Application to Nanotechnologies,” in Proc. DesignAutomation Testin Europe Conf., 2004, pp. 904-909. Department of Computer Science, National TsingHua University, Taiwan, R.O.C.

  37. Outline • Introduction • Rewiring • Simplification • Experimental results • Conclusion Department of Computer Science, National TsingHua University, Taiwan, R.O.C.

  38. Conclusion • We proposes a new rewiring technique for threshold networks. • It works by directly removing the target wire and then correcting the functionality by adding the corresponding rectification networks. • A simplification procedure for canonicity that is directly applied to a single LTG is also proposed. • When the threshold logic becomes active in the research of VLSI circuits, this rewiring algorithm will facilitate its applications to logic synthesis and various optimization goals. Department of Computer Science, National TsingHua University, Taiwan, R.O.C.

  39. Thanks for your attention. Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.

  40. Q & A Department of Computer Science, National Tsing Hua University, Taiwan, R.O.C.

More Related