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Processor Design 5Z032

Explore the fundamentals of computer systems, including processors, memory types, chips, and communication protocols. Learn about abstraction layers, processor operation, memory sizes, and semiconductor advancements. Delve into the evolution of computer architectures and programming basics.

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Processor Design 5Z032

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  1. Processor Design5Z032 Computer Systems Overview Chapter 1 Henk Corporaal Eindhoven University of Technology 2011 TU/e Processor Design 5Z032

  2. Topics • Computer revolution • What is a computer system? • Processor • Memory • Chips and semiconductor • Communication • Programming a computer (basics) TU/e Processor Design 5Z032

  3. Computer revolution • Computers everywhere • PCs, portables, and workstations O(100M)/year • Embedded systems O(1000M)/year • Playstations O(50M/year) • World Wide Web • Huge calculations • Human genome project • Large simulations • Information retrieval • Huge databases • Online libraries • Web pages • Computer performance growth TU/e Processor Design 5Z032

  4. What is a computer system? Display harddisk network connection printer keyboard actuators sensors TU/e Processor Design 5Z032

  5. What is a computer system? Components: • input (mouse, keyboard) • output (display, printer) • memory • internal: DRAM, SRAM • external: hard disk drives, CD, floppy drive • network • see figs 1.4 - 1.12 TU/e Processor Design 5Z032

  6. Structure of a computer system? Instruction memory Data memory Processor I/O interfaces Input and output devices TU/e Processor Design 5Z032

  7. Focus • Our primary focus: the processor (CPU = central processing unit) • datapath and • control • Implemented using millions of transistors • Impossible to understand by looking at each transistor • We need… abstractions …. at many levels TU/e Processor Design 5Z032

  8. Abstraction • Abstraction: • Give a complex item/object/structure a name • hide detail • The name represents this item/object/structure and can be used inside other items/objects/structures • This gives a hierarchical description • Examples: • Binary abstraction • Circuit abstraction • Machine instruction abstraction • Program abstraction • Data abstraction TU/e Processor Design 5Z032

  9. Abstraction layers High level language Software Intermediate language level Compiler Operating system level Architecture / assembly Instruction set architecture (ISA) Register transfer level (RTL) Implementation / digital design Gate level Realization VLSI level TU/e Processor Design 5Z032

  10. Processor • General purpose processors (GPPs) (1995) • 80x86 50 Million • MIPS 5.5 Million • PowerPC 3.3 Million • Sparc 700 K • HP PA-RISC 300 K • DEC Alpha 200 K • Performance: see fig 1.20 (pg 30) • grows with about 50% per year • doubling each 1.6 years • hundred fold increase last 10 years TU/e Processor Design 5Z032

  11. Processor • How does a processor operate ? • Performance growth, how? • Realization improvements • VLSI developments • Implementation improvements • Pipelining • Better circuits • Architecture improvements • Exploit parallelism • Prediction TU/e Processor Design 5Z032

  12. Memory • Size • units: bit, byte, kbit, kbyte, Mbit, Mbyte, Gbit, Gbyte, Tbit, Tbyte,... • growth rate: see fig 1.14 • DRAM growth rule: 4 times each 3 years • Types: • Volatile: SRAM, DRAM • Non-volatile: • Internal: ROM (and its many variants) • External: hard disk, floppy, CDROM, magnetic tape • Performance metrics: • Latency: access time in seconds (or nano seconds) • Throughput: bytes/second • Price / Performance or Price / Mbyte TU/e Processor Design 5Z032

  13. Chips and semiconductor • VLSI improvements • Density • Processor O(100 Million) transistors/chip • Memory O(4 Billion) transistors/chip (DRAM) • Decreasing feature size: now 0.13 m, next 0.09 m • Speed of a transistor ~ 1/gate-length • However: future problems • wiring delays • quantum effects (like charge tunneling) • Note: chip area not much increasing • maximal about 1.5 cm x 1.5 cm • yield !! TU/e Processor Design 5Z032

  14. Wafer area Dies per wafer = Die area 1 Yield = (1+(Defects per area x Die area/2))2 Cost of an integrated circuit Cost per wafer Cost per die = Dies per wafer * Yield Result: Cost of die = f (Die area ?) TU/e Processor Design 5Z032

  15. Communication • Computers can act stand alone, or in a network • Why network connected computers? • Communication • information exchange • Resource sharing • printers, modems, scanners, large storage capacities • Interconnection is standardized through protocol agreements • IP, TCP, Ethernet, Modem, Bluetooth standards, etc. TU/e Processor Design 5Z032

  16. Programming a computer s w a p ( i n t v [ ] , i n t k ) H i g h - l e v e l { i n t t e m p ; l a n g u a g e t e m p = v [ k ] ; p r o g r a m v [ k ] = v [ k + 1 ] ; ( i n C ) v [ k + 1 ] = t e m p ; } Assembler C compiler 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 1 1 0 0 0 0 1 1 0 0 0 0 0 1 0 0 0 0 1 1 0 0 0 1 1 0 0 0 1 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 s w a p : 1 0 0 0 1 1 0 0 1 1 1 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 A s s e m b l y m u l i $ 2 , $ 5 , 4 l a n g u a g e 1 0 1 0 1 1 0 0 1 1 1 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 a d d $ 2 , $ 4 , $ 2 p r o g r a m l w $ 1 5 , 0 ( $ 2 ) 1 0 1 0 1 1 0 0 0 1 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 ( f o r M I P S ) l w $ 1 6 , 4 ( $ 2 ) 0 0 0 0 0 0 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 s w $ 1 6 , 0 ( $ 2 ) s w $ 1 5 , 4 ( $ 2 ) B i n a r y m a c h i n e j r $ 3 1 l a n g u a g e p r o g r a m ( f o r M I P S ) TU/e Processor Design 5Z032

  17. Instruction Set Architecture: ISA • A very important abstraction • interface between hardware and low-level software • standardizes instructions, machine language bit patterns, etc. • advantage: different implementations of the same architecture • disadvantage: sometimes prevents using new innovationsTrue or False: Binary compatibility is extraordinarily important? • Modern instruction set architectures: • 80x86/Pentium/K7 (IA-32), PowerPC, DEC Alpha, MIPS, SUN SPARC, HP-PA, IA-64, and what about JVM? TU/e Processor Design 5Z032

  18. Where we are headed • Performance issues (Chapter 2) • vocabulary and motivation • A specific instruction set architecture (Chapter 3) • Arithmetic and how to build an ALU (Chapter 4) • Constructing a processor to execute our instructions (Chapter 5) • Pipelining to improve performance (Chapter 6) • Memory: caches and virtual memory (Chapter 7) • I/O (Chapter 8) • Preliminaries: • Logic design (appendix B)Key to a good grade: reading the book, try exercises! TU/e Processor Design 5Z032

  19. Exercises • Try the following from chapter one: • 1.1 - 1.44 about definitions and terminology • 1.46, 1.47 • 1.48 (read ‘in depth’ section pg. 48 first), 1.50 TU/e Processor Design 5Z032

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