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Calvin College - Engineering Department Analog Design Spring 2002 Engineering 332. Professor: Paulo F. Ribeiro, SB130 X6407, PRIBEIRO@CALVIN.EDU Textbook: Sedra / Smith, Microelectronic Circuits, Fourth Edition Lectures: 12:30-1:20PM (MWF) SB203
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Calvin College - Engineering Department Analog Design Spring 2002 Engineering 332 Professor: Paulo F. Ribeiro, SB130 X6407, PRIBEIRO@CALVIN.EDU Textbook: Sedra / Smith, Microelectronic Circuits, Fourth Edition Lectures: 12:30-1:20PM (MWF) SB203 Laboratory (Wednesdays 1:30-4:20 PM) SB 136 and SB28
Course objectives To focus on the design of amplifiers, filters, oscillators, and converters with an emphasis on design. Topics covered Differential and Multistage Amplifiers, Frequency Response, Feedback, Output Stages, Analog Integrated Circuits (741), Filters and Tuned Amplifiers, Signal Generators. Class/laboratory schedule 2-3 lectures per week plus 3-hour laboratory. Contribution of course to meeting the professional component This course contributes primarily to the students' knowledge of engineering topics, and does provide design experience.
Relationship of course to undergraduate degree program objectives This course primarily serves students in the department. The information below describes how the course contributes to the undergraduate program objectives. Mastery of specific technical design skills which are key to a wide range of electrical engineering applications. Mastery and critical evaluation of the use of computer aided simulation tools (SPICE) as an engineering design aid. Assessment of student progress toward course objectives Student's design skills is assessed primarily on detailed homework and design problems that involve the use of analytical and simulation tools such as PSPICE.
Schedule Topics Chapter # of classes Differential and Multistage Amplifiers 6 6 Frequency Response 7 6 Feedback 8 6 Output Stages 9 6 Analog Integrated Circuits (741) 10 3 Filters and Tuned Amplifiers 11 3 Signal Generators 12 3
Design Part I: Chapters 6, 7 Design Part II: Chapters 8, 9, 10 Final Design: Chapter 11, 12 Spring Break March 9-18 Reading Recess April 16-17 Grading Design Part I 20% Design Part II 20% Labs 15% Homework and Assignments 15% Participation 10% Final Design 20% 100%
Lab Schedule: • Lab 1 – The BJT Differential Pair and Amplifications • Lab 2 – Single-BJT Amplifiers at Low and High Frequencies • Lab 3 – Principles of Feedback Using and Op-AMP Building Block • Lab 4 – Basic Output-Stage Topologies • Lab 5 – OP-AMP-RC Filter Topologies • Lab 6 – Waveform Generators • Extra Lab – Power Supply
Differential and Multistage Amplifiers The most widely used circuit building block in analog integrated circuits. Use BJTs, MOSFETS and MESFETs (metal semiconductor FET – read 5.12 – Gallium Arsenide-GaAs Device).
The BJT Differential Pair Connection to RC not essential to the operation Essential that Q1 and Q2 never enter saturation Implemented by a transistor circuit Use CD
Different Modes of Operation Common voltage I/2 vE = vCM-VBE vC1 = VCC – ( ½) a I RC vC2 = VCC – ( ½) a I RC vC1 – vC2 = ? Vary vCM (what happens?) Rejects common-mode Differential pair with a common-mode input
Different Modes of Operation vB1 = +1 Q1 Q2 vE = 0.3 Keeps Q2 off vC1 = VCC - a I RC vC2 = VCC Differential pair with a large differential input
Different Modes of Operation Differential pair with a large differential input o opposite polarity To that of (b)
Different Modes of Operation Differential pair with a small differential input
Large-Signal Operation of the BJT Differential Pair Equations Which can be manipulated to yield I The collector currents can be obtained by multiplying the emitter currents by Alfa, which is ver close to unity I
Large-Signal Operation of the BJT Differential Pair Relatively small difference voltage vB1 – vB2 will cause the current I to flow almost entirely in one of the two transistors. 4.VT (~100mV) is sufficient to switch the current to one side of the pair.
Small-Signal Operation The Collector Currents When vd is applied Multiplying by Assuming vd<<2VT ~ Interpretation: IC1 increases by ic and iC2 decreases by ic
An Alternative Viewpoint Assume I to be ideal – its incremental resistance will be infinite and vd appears across a total resistance 2.re. A simple technique for determining the signal currents in a differential amplifier excited by a differential voltage signal vd; dc quantities are not shown.
If emitter resistors are included A differential amplifier with emitter resistances. Only signal quantities are shown (on color).
Input Differential Resistance This is the resistance-reflection rule; the resistance seen between the two bases is equal to the total resistance in the emitter circuit multiplied by the beta+1
Differential Voltage Gain ~ The voltage gain is equal to the ratio of the total resistance in the collector circuit (2RC) to the total resistance in the emitter circuit (2re+2RE)
Equivalence of the Differential Amp. To a Common-Emitter Amp. Differential amplifier fed in a complementary manner (push-pull or balanced) Base of Q1 raised Based of Q2 lowered Equivalence of the differential amplifier (a) to the two common-emitter amplifiers in (b). This equivalence applies only for differential input signals. Either of the two common-emitter amplifiers in (b) can be used to evaluate the differential gain, input differential resistance, frequency response, and so on, of the differential amplifier.
Common-Mode Gain Assuming symmetry Common-mode half-circuits If output is taken single-endedly Acm and the differential gain AdWe can define CMRR Assuming non-symmetry
Input Common-Mode Resistance Ricm ro vCM vCM 2 . Ricm Equivalent common-mode half-circuit Since the input common-mode resistance is usually very large, its value will be affected by the transistor resistances R0 and rm Ricm =
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Finally, brothers, whatever is true, wherever is noble, whatever is right, what ever is pure, whatever is lovely, whatever is admirable – if anything is excellent or praiseworthy – think about such things. Phil. 4:8 I gladly admit that we number among us men and women whose modesty, courtesy, fair-mindedness, patience in disputation and readiness to see an antagonist's point of view, are wholly admirable. I am fortunate to have known them. But we must also admit that we show as high percentage as any group whatever of bullies, paranoiacs, backbiters, mopes, milksops, etc.. The loutishness that turns every argument into a quarrel is really no rarer among us than among the sub-literate; the restless inferiority-complex (“stern to inflict” but not “stubborn to endure”) which bleeds at a touch but scratches like a wildcat is almost as common among us as among schoolgirls. CS Lewis.
Biasing In BJT Integrated Circuits Many resistors, transistors and capacitors makes impossible to use conventional biasing methods Biasing in IC is based on the use of constant-current sources The Diode-Connected Transistor Shorting the base and the collector of a BJT results in a two-terminal device having an I-v characteristic identical ot the iE-vBE of the BJT. Since the BJT is still in active mode (vCB=0 results in an active mode operation) the current I divides between base and collector according to the value of the BJT Beta. Thus, the BJT still operates as a transistor in the active mode. This is the reason the I-v characteristics of the resulting diode is identical to the iE-vBE relationship of the BJT i
The Current Mirror Io Finite Beta and Early Effect
Get wisdom, get understanding; do not forget my words or swerve from them. Do not forsake wisdom, and she will protect you; love her, and she will watch over you. Wisdom is supreme; therefore get wisdom. Though it cost all you have, get understanding. Esteem her, and she will exalt you; embrace her, and she will honor you. She will set a garland of grace on your head and present you with a crown of splendor. Prov. 4:4-8 However, this impulse to pursue the intellectual life must be kept "pure and disinterested," for the alternative is to "come to love knowledge-our knowing-more than the thing known: to delight not in the exercise of our talents but in the fact that they are ours, or even in the reputation they bring us". We must not think Pride is something God forbids because He is offended at it, or that Humility is something He demands as due to His own dignity -- as if God Himself was proud. He is not in the least worried about His dignity. The point is, He wants you to know Him: wants to give you Himself. And He and you are two things of such a kind that if you really get into any kind of touch with Him you will, in fact, be humble -- delightedly humble, feeling the infinite relief of having for once got rid of all the silly nonsense about your own dignity which has made you restless and unhappy all your life. He is trying to make you humble in order to make this moment possible: trying to take off a lot of silly, ugly, fancy-dress in which we have all got ourselves up and are strutting about like the little idiots we are.
Current-Steering Circuits IC Circuits 2 power supplies IREF is generated in the branch of the diode-connected transistor Q1, resistor R, and the diode-connected transistor Q2. Generation of a number of cross currents.
Comparison With MOS Circuits 1 - The MOS mirror does not suffer from the finite Beta 2 – Ability to operate close to the power supply is an important issue on IC design 3 - Current Transfer: BJTs ~ relative areas; MOS ~ W/L 4 - VA lower for MOS Improved Current-Source Circuits
The Wilson Current Mirror Output resistance equal A factor greater the then simple Current source Disadvantage: reduced output swing. Observe that the voltage at the collector at Q3 has to be greater than the negative supply voltage by (vBB1 = VCEsat-3), which is about a volt.
Widlar Current Source It differs from the basic current mirror in an important way: a resistor RE is included in the emitter lead of Q2. Neglecting the base current we can write:
Multistage Amplifiers – Example 6.4 – pg. 552 Calculating 1st stage gain -- Assuming b=100 V = = = = W r r 100 25 T e 1 e 2 I . 25 E Model Eqs. on Pg. 263 b V V = = b = b r ( ) ( ) T T p b g I ( ) I m C E b + 1 = = b + r r ( 1 )( r ) p p 1 2 e = = W 101 * 100 10 . 1 k = + = W R r r 20 . 2 k p p id 1 2 In the same manor = + R r r p p i 2 4 5 = ´ b + ´ R 2 ( 1 ) r p i 2 = ´ ´ = W 2 ( 101 25 ) 5 . 05 k Current sources for biasing amplifying stages By Justin Jansen
Multistage Amplifiers – Example 6.4 – pg. 552 Total collector resistance Calculating 1st stage gain 1 Ri2 Total emitter resistance