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ELEC 301

ELEC 301. Volkan Kursun. Design Metrics. Announcements. Project is announced Form a group of two students by March 19 2009 (next Thursday) Give the names of your group members to the lab technician Alex by March 19 2009 You cannot modify the group members after March 19. Announcements.

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ELEC 301

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  1. ELEC 301 Volkan Kursun Design Metrics

  2. Announcements • Project is announced • Form a group of two students by March 19 2009 (next Thursday) • Give the names of your group members to the lab technician Alex by March 19 2009 • You cannot modify the group members after March 19

  3. Announcements • HW1 solution is on the web • HW2: on the web • Midterm exam • Venue: Lecture Theater A • Date: 31 Mar 2009 (Tue) • Time: 18:50 - 21:00 • Closed book exam • No copy sheets • Bring a calculator

  4. Representation of Digital Signals • Digital systems perform operations on logical (Boolean) variables • A logical variable can have two discrete values • X: 0, 1 • A logical variable is a mathematical abstraction • Physical implementation requires the representation of logical variables with electrical quantities • Voltage

  5. Representation of Digital Signals • Node voltage • Not discrete • Has a continuous range of values • Turn the electrical voltage into a discrete variable by associating a nominal voltage level with each logic state • 1: VOH • 0: VOL • VOH and VOL represent the nominal high and low logic levels, respectively

  6. Reliability―Noise in Digital Integrated Circuits V ( t ) v DD i ( t ) Inductive coupling Capacitive coupling Power and ground noise • Noise: unwanted variation of voltage and current at a circuit node

  7. Mapping Between Analog and Digital Signals • Digital circuits can tolerate certain amount of deviations from the nominal voltages • Logic levels are represented by a range of acceptable voltages, rather than only by a nominal voltage • The voltage ranges of logic levels are separated by a region of uncertainty OH OL IH IL V V V V ” ” 0 1 Region Undefined “ “

  8. DC OperationVoltage Transfer Characteristics • Electrical function of a gate is determined by the voltage transfer characteristics • DC transfer characteristics • Plot the output voltage as a function of the input voltage • Vout = f (Vin) • Determine the acceptable ranges of input and output voltages

  9. DC OperationVoltage Transfer Characteristic Vout VOH = f(VOL) VOL = f(VOH) VM = f(VM) V f OH Vout = Vin Switching Threshold Voltage VM V OL Vin V V OL OH Nominal Voltage Levels

  10. Mapping Between Analog and Digital Signals • The regions of acceptable high and low voltages are delimited by VIH and VIL V out V “ 1 ” OH Slope = -1 V OH V IH Vin = Vout Undefined Gate switching threshold voltage Region V IL Slope = -1 V OL “ 0 ” V OL V V V IL IH in

  11. Noise Margins • For a gate to be robust, the acceptable voltage ranges of the “0” and “1” logic levels must be as large as possible • Concept of noise margins • A measure of the tolerance of a gate to noise • Noise margin low (NML) • Quantizes the range of voltages considered valid 0 • Noise margin high (NMH) • Quantizes the range of voltages considered valid 1

  12. Definition of Noise Margins • Steady-state signals must avoid the undefined region for a proper operation Lowest voltage that is considered logic high: “1” "1" V OH NM H Noise margin high V IH UndefinedRegion V NM IL L Noise margin low V OL Highest voltage that is considered logic low: “0” "0" Gate Input Gate Output

  13. Noise Budget • Noise sources: supply noise, cross talk, and interference • Differentiate between static and dynamic noise sources • Static noise budget allocates gross noise margins to expected sources of noise • Static noise margins result in very conservative designs

  14. Regenerative Property • A voltage v0 that deviates from the nominal voltages is applied to the first inverter • The signal gradually converges to one of the nominal values after a number of inverter stages

  15. v v v v v v v 0 1 2 3 4 5 6 Signal Regeneration (Restoration) • Ex: Chain input signal Vo is degraded due to noise → reduced voltage swing A chain of inverters The deviation in voltage levels disappears as the signals propagate through a chain of inverters Simulated response

  16. N Fan-out N Fan-in and Fan-out • Fan-out: number of loading gates connected to the output of a gate • Fan-in: number of inputs M Fan-in M

  17. N Fan-out N Fan-in and Fan-out • Increasing the fan-out can affect the output logic level • To minimize the effect of fan-out on logic levels • Input resistance of load gates must be as large as possible • Low output current to the fan-out gates • Output resistance of the driver gate must be as small as possible • Reduce the effect of output currents on the output voltage level

  18. R = ¥ i R = 0 o The Ideal Gate Voltage Transfer Characteristics V out Fanout = ¥ NMH = NML = VDD/2 g=  V in

  19. 5.0 NM 4.0 L 3.0 (V) 2.0 out V V M NM H 1.0 0.0 1.0 2.0 3.0 4.0 5.0 V (V) in An Old-time Inverter: NMOS • VDD = 5V, VGND = 0V • VOH = 3.5V, VOL = 0.45V, VIH = 2.35V, VIL = 0.66V, VM = 1.64V, NML = 0.21V, NMH = 1.15V • Issues: • Asymmetrical VTC • Narrow noise margins • Low NML • VOH < VDD • VOL > 0 • Low output voltage swing • (VOH - VOL) < VDD

  20. Delay Definitions • How quickly does a circuit respond to a change of the inputs? • Delay experienced by a signal while propagating through a circuit • Propagation delay is a function of • Technology • GaAs vs. silicon CMOS • Circuit topology • Slopes of the input signals • Load and driver impedances

  21. Delay Definitions High-to-low and low-to-high propagation delays tp = (tPHL + tPLH) / 2 Rise time: tr Fall time: tf

  22. T = 2 ´ t ´ N p Ring Oscillator 1 1 1 1 1 1 0 0 0 0 0 0 For oscillation: 2Ntp >> tr+tf Otherwise the propagating signals overlap and dampen the oscillation

  23. R v out v C in A First-Order RC Network tp = ln (2) t = 0.69 RC Simplest model to represent the delay of an inverter

  24. Power Dissipation • Power: energy dissipated or stored per unit of time • Influences several design decisions • Power supply • Power distribution network • Nominal supply voltage VDD and tolerable variation • Supply current demand • Battery lifetime • Heat dissipation • Packaging • Cooling system

  25. Power Dissipation • Limits the number of devices than can be integrated on an IC • Limits how fast a circuit can operate • Faster circuits tend to consume more power • Limits the number of operations that can be performed between battery changes

  26. Power Dissipation Instantaneous power: p(t) = v(t)i(t) = Vsupplyi(t) Peak power: ppeak = Vsupplyipeak = max [p(t)] Critical in power supply and distribution network design Average power: Critical to determine the cooling and battery requirements

  27. Power – Components • Dynamic power: Occurs during transients when a circuit is switching • Due to charging of capacitors • + temporary current paths between the supply rails • Proportional to the switching frequency • The higher the number of switching events the greater the dynamic power consumption • Static power: Occurs statically, all the time, regardless of a switching activity • Caused by the static conduction paths between the supply rails and the leakage currents

  28. Power – Speed Relationship • Propagation delay is determined by the speed at which a given amount of energy can be transferred to/from the parasitic capacitors of a circuit (C = Q / V) • The faster the energy transfer, the higher the circuit speed is • Faster energy transfer means higher power consumption • Reminder: • Power: energy dissipated or stored per unit of time

  29. A First-Order RC Network R v out v CL in

  30. Energy and Energy-Delay Product Power-Delay Product (PDP) =Pav tp PDP: Energy (E) consumed by a gate per switching event Energy-Delay Product (EDP) = power x delay2 quality metric of a gate = E  tp

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