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Express Cube Topologies for On-chip Interconnects

Express Cube Topologies for On-chip Interconnects. Boris Grot J. Hestness, S. W. Keckler, O. Mutlu † The University of Texas at Austin † Carnegie Mellon University ‡ Part of this work was performed at Microsoft Research. HPCA ‘09. Feb 17, 2009. The Era of Many-core. UT TRIPS

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Express Cube Topologies for On-chip Interconnects

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  1. Express Cube Topologies for On-chip Interconnects Boris Grot J. Hestness, S. W. Keckler, O. Mutlu† The University of Texas at Austin †Carnegie Mellon University ‡Part of this work was performed at Microsoft Research HPCA ‘09 Feb 17, 2009

  2. HPCA ‘09 The Era of Many-core • UT TRIPS • 2x16 exec tiles • 16 NUCA tiles • Multiple networks • Intel Larrabee • 16+ cores • Bidirectional ring interconnect • Intel Polaris • 80 tiles • 8x10 mesh • TileraTile • 64 cores • 5 mesh networks

  3. HPCA ‘09 Networks on a Chip (NOCs) • On-chip advantages • No pin constraints • Rich wiring resources • On-chip limitations • 2D substrates limit implementable topologies • Logic area constrains use of wiring resources • Energy/power budget caps • Focus • Topologies for tomorrow’s many-core CMPs

  4. HPCA '09 Outline • Introduction • Existing topologies • Multidrop Express Channels (MECS) • Evaluation • Generalized Express Cubes • Summary

  5. HPCA '09 2-D Mesh

  6. HPCA '09 2-D Mesh • Pros • Low design & layout complexity • Simple, fast routers • Cons • Large diameter • Energy & latency impact

  7. HPCA '09 Concentration (Balfour & Dally, ICS ‘06) • Pros • Multiple terminals attached to a router node • Fast nearest-neighbor communication via the crossbar • Hop count reduction proportional to concentration degree • Cons • Benefits limited by crossbar complexity

  8. HPCA '09 Concentration • Side-effects • Fewer channels • Greater channel width

  9. HPCA ‘09 Replication • Benefits • Restores bisection channel count • Restores channel width • Reduced crossbar complexity CMesh-X2

  10. HPCA '09 Flattened Butterfly (Kim et al., Micro ‘07) • Objectives: • Improve connectivity • Exploit the wire budget

  11. HPCA '09 Flattened Butterfly (Kim et al., Micro ‘07)

  12. HPCA '09 Flattened Butterfly (Kim et al., Micro ‘07)

  13. HPCA '09 Flattened Butterfly (Kim et al., Micro ‘07)

  14. HPCA '09 Flattened Butterfly (Kim et al., Micro ‘07)

  15. HPCA '09 Flattened Butterfly (Kim et al., Micro ‘07) • Pros • Excellent connectivity • Low diameter: 2 hops • Cons • High channel count: k2/2 per row/column • Low channel utilization • Increased control (arbitration) complexity

  16. HPCA '09 Multidrop Express Channels (MECS) • Objectives: • Connectivity • More scalable channel count • Better channel utilization

  17. HPCA '09 Multidrop Express Channels (MECS)

  18. HPCA '09 Multidrop Express Channels (MECS)

  19. HPCA '09 Multidrop Express Channels (MECS)

  20. HPCA '09 Multidrop Express Channels (MECS)

  21. HPCA ‘09 Multidrop Express Channels (MECS)

  22. HPCA ‘09 Multidrop Express Channels (MECS) • Pros • One-to-many topology • Low diameter: 2 hops • k channels row/column • Asymmetric • Cons • Asymmetric • Increased control (arbitration) complexity

  23. HPCA '09 Analytical Comparison

  24. HPCA '09 Experimental Methodology

  25. HPCA '09 64 nodes: Uniform Random

  26. HPCA '09 256 nodes: Uniform Random

  27. HPCA '09 Energy (100K pkts, Uniform Random)

  28. HPCA '09 64 Nodes: PARSEC

  29. HPCA '09 Generalized Express Cubes • Low-dimensional k-ary n-cube • n = {1,2} • Good fit for planar silicon • Express channels • Improve connectivity • MECS for better wire utilization • Multiple networks • Improve throughput • Reduce crossbar area & energy overhead • Hierarchical scaling

  30. HPCA '09 Partitioning: a GEC Example MECS MECS-X2 Partitioned MECS Flattened Butterfly

  31. HPCA '09 Summary • MECS • A novel one-to-many topology • Good fit for planar substrates • Excellent connectivity • Effective wire utilization • Generalized Express Cubes • Framework & taxonomy for NOC topologies • Extension of the k-ary n-cube model • Useful for understanding and exploring on-chip interconnect options • Future: expand & formalize

  32. HPCA '09 Summary • MECS • A novel one-to-many topology • Good fit for planar substrates • Excellent connectivity • Effective wire utilization • Generalized Express Cubes • Framework & taxonomy for NOC topologies • Extension of the k-aryn-cube model • Useful for understanding and exploring on-chip interconnect options • Future: expand & formalize

  33. HPCA '09

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