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LOW-LEAKAGE REPEATERS FOR NETWORK-ON-CHIP INTERCONNECTS

Technion – Israel Institute of Technology. LOW-LEAKAGE REPEATERS FOR NETWORK-ON-CHIP INTERCONNECTS. Arkadiy Morgenshtein, Israel Cidon, Avinoam Kolodny, Ran Ginosar. QNoC Research Group Electrical Engineering Department Technion – Israel Institute of Technology Haifa, Israel. Highlights.

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LOW-LEAKAGE REPEATERS FOR NETWORK-ON-CHIP INTERCONNECTS

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  1. Technion – Israel Institute of Technology LOW-LEAKAGE REPEATERS FOR NETWORK-ON-CHIP INTERCONNECTS Arkadiy Morgenshtein, Israel Cidon, Avinoam Kolodny, Ran Ginosar QNoC Research Group Electrical Engineering Department Technion – Israel Institute of Technology Haifa, Israel

  2. Highlights • Leakage in NoC links with repeaters • Selecting the Repeater Type • Optimizing Repeater Insertion • Utilization-Oriented Analysis

  3. Networks-on-Chip (NoC) • NoC characteristics • Packet-based data routing • Multiple Quality-of-Service levels • Physical layer of NoC • Low link utilization • Most links idle most of the time! • Leakage power is important

  4. Dual Threshold • Sleep Transistors Leakage Reduction in Logic Subthreshold leakage is dominant at high temperatures Solutions: • more…

  5. unique characteristics large sizes very high wire loads no transistor stack Leakage Reduction in Repeaters Solutions: ? specific solutions needed

  6. Existing Repeater Types LVT – Low-Vt Repeaters • fast • high leakage HVT – High-Vt Repeaters • slow • low leakage SVT - Staggered-Vt • fast (In 01) • slow (In 10) • low leakage (idle) [16] Sylvester et al.

  7. Research Outline Network-on-Chip Low & Varying Utilization Selecting the Repeater Type Optimizing Repeater Insertion & SR – Sleep Repeaters DTD – Dual-Vt Domino Repeaters Utilization-Dependant Optimal Number of Repeaters Utilization-Oriented Analysis

  8. Dual-Threshold Domino (DTD) Repeaters High-Vt Evaluation Transistors Low-Vt Pre-charge Transistors synchronized Clk link

  9. X X X X X X X X DTD Repeaters Operation • Precharge transistors disconnected • CLK line is synchronized with Data • Evaluation by HVT transistors –slower but tolerant to Vt fluctuations • Each Evaluation transistor drives only one transistor at next stage –fasterandcan be down-sized

  10. X X X X X X X X DTD Repeaters Operation • Evaluation transistors disconnected • Precharge to low-leakage mode • Precharge by LVT transistors -fast

  11. DTD Repeaters Operation X X 0 0 1 1 X X X X 1 0 1 0 X X • HVT transistors are “off” –low leakage 0 1 0 1

  12. DTD Repeaters Operation X X X X 0 0 1 1 X X X X X X X X 1 0 1 0 X X X X • For Data=‘0’ -no transition occurs

  13. X X X X X X X X DTD Repeaters Operation

  14. DTD Highlights • Application of domino and double-Vt techniques to low-leakage repeaters Benefits + Effective leakage reduction during standby + Reduced load on each repeater allowing downscaling and area reduction + Tolerance to VT fluctuations by using HVT evaluation transistors Drawbacks - Increased dynamic power consumption due to signaling in domino protocol - Overhead of clock line and pre-charge wiring

  15. Sleep Transistors in Repeaters MTCMOS Logic Evolution SR Repeaters

  16. MTCMOS in Repeaters • Common sleep transistors insertion • + Both NMOS and PMOS are used • All stages enter and exit “sleep” mode simultaneously • LARGE sleep transistors • High routing complexity and wiring overhead

  17. Repeaters with Per-Stage Sleep Transistor • Distributed sleep transistors along the link • Each stage of repeaters has a separate pair of sleep transistors • + One stage of repeaters is active • - others are in low-leakage • standby • - Sleep Transistor is heavily loaded and has to be scaled with link width

  18. Repeaters with Per-Stage Sleep Transistor • Distributed sleep transistors along the link • Each stage of repeaters has a separate pair of sleep transistors • + One stage of repeaters is active • - others are in low-leakage • standby • - Sleep Transistor is heavily loaded and has to be scaled with link width active sleep sleep

  19. Repeaters with Per-Stage Sleep Transistor • Distributed sleep transistors along the link • Each stage of repeaters has a separate pair of sleep transistors • + One stage of repeaters is active • - others are in low-leakage • standby • - Sleep Transistor is heavily loaded and has to be scaled with link width sleep active sleep

  20. Repeaters with Per-Stage Sleep Transistor • Distributed sleep transistors along the link • Each stage of repeaters has a separate pair of sleep transistors • + One stage of repeaters is active • - others are in low-leakage • standby • - Sleep Transistor is heavily loaded and has to be scaled with link width sleep sleep active

  21. SR – Sleep Repeaters Parallel link using individual zigzag sleep transistors: • One sleep transistor per repeater • + Smaller sleep transistors • + Simpler routing • Zigzag connection: • Only to transistors that are off during sleep • + Number of sleep transistors is reduced by 50% 1 0 0 1 0 0

  22. Sleep Repeater Highlights • Novel: Efficient sleep transistors for repeaters Benefits + Effective leakage reduction during standby + Optimized structure according to specifics of repeater insertion Drawbacks - Area overhead - Increased dynamic power consumption due to additional transistors

  23. Simulation Setup • 65nm BPTM models for transistors and interconnect • 32-bit link operating at 105°C temperature • LVT design was used as baseline for repeater insertion: • Scaling factor was adjusted for SVT, DTD and SR to meet the delay target equal to LVT • Area, delay and energy were obtained for each of the compared techniques

  24. Total Repeater Area + DTD smallest area - SR largest area

  25. Energy vs. Utilization • SVT: Least energy at high utilization • + SR: Least energy at low utilization 8mm link

  26. Utilization-Dependant Optimal Number of Repeaters Set Target Delay (D<Dopt) Repeaters Sizing for (1<K<n) Optimal K for minimal Leakage Power - Kleak Optimal K for minimal Dynamic Power - Kdyn != Calculate Ratio of Total Power for Kdynand Kleak vs. Utilization Find for which utilization rates k_leak or k_dyn is optimal

  27. Optimal Number of Repeaters example • For each k a suitable sizing factor h is found to meet the target delay • Optimal k for minimal leakage is kleak=4 • Optimal k for minimal dynamic power is kdyn=6 kleak kdyn Power vs. k for target D=309ps (instead of Dmin=280ps), L=10mm

  28. Number of Repeaters vs. Utilization example • Total power as function of utilization for Kdyn and Kleak • Power ratio is calculated for Kdynand Kleak • + Break-even point is at 40% utilization • + The results of Kleak are up-to 17% better at low utilization rates Prefer Kleak Prefer Kdyn Power ratio of Kdyn vs. Kleak

  29. Summary • DTD (Dynamic Dual-Threshold) Repeaters • SR (Sleep Repeaters) • Zig-zag structure • SR least power at low utilization • Thanks to low leakage • Optimal number of repeaters depends on link utilization

  30. Questions?

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