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Dual Port Products

Dual Port Products. The Largest Multi-Port SRAM Product Line Worldwide. Specialty Memory Products. 1. Product Portfolio. #. First to Introduce:. First to Introduce:. Dual-Port Manufacturer Worldwide!. Width : x9, x16, x36. Synchronous Dual-Ports. Speed : Sub-20ns.

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Dual Port Products

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  1. Dual Port Products The Largest Multi-Port SRAM Product Line Worldwide

  2. Specialty Memory Products 1 Product Portfolio # First to Introduce: First to Introduce: Dual-Port Manufacturer Worldwide! Width: x9, x16, x36 Synchronous Dual-Ports Speed: Sub-20ns Bank-SwitchableTM Sub-12ns fpBGA Packaging 133 MHz STQFP Packaging Density: 16K-bit TQFP Packaging 32K-bit Master/Slave 64K-bit FourPortTM 128K-bit SARAMTM 256K-bit 3.3V 512K-bit 2.5V I/O 1024K-bit

  3. Improved BANDWIDTH x36, x18 12 ns async or 133 MHz sync Reduced BOARDSPACE Fewer devices for same functionality High-density devices Innovative packages Improved MANUFACTURABILITY Improved TIME TO MARKET Competitive COST Reduced DESIGN COMPLEXITY Counters Arbitration, Semaphores, Mailboxes, Master/Slave Reduced COMPONENTS LIST Reduced POWER Improved FLEXIBILITY Dual Port Benefits

  4. New Dual Port Products • Speed Upgrades • 70V27 (32K x 16) improved to 15 ns • 70V9279 Family (32K x 16) improved to 9 ns • 70V28 Family (64K x 16) • 24 new products • 5V, 3.3V, Sync, Async, x8, x9, x16, and x18 variations • Introduced fpBGA packaging • 70V27 (32K x 16) • 70V3579 (32K x 36) • 70V3579 Family (32K x 36) • Speed now improved to 133 MHz • I/Os now selectable - 3.3V or 2.5V

  5. IDT70V3579 FamilyFeatures High Speed 32Kx36 3.3V Synchronous Pipelined Dual-Port Static RAM Selectable 3.3V/2.5V I/O

  6. The Solution IDT’s improved 70V3579 Family provides: • x36 and x18 Configurations • Synchronous ~133 MHz operations • 3.3V Core Voltage • 3.3V/2.5V Selectable I/O Voltage • 512Kb and 1Mb density options Bandwidth Flexible Voltages Density

  7. I/O Control Logic I/O Control Logic 32Kx36 1Mbit Memory Array Block Diagram IDT70V3579 CLOCKL* Byte Enables (x9) Read/Write Chip Enables Output Enable OPTL CLOCKR* Byte Enables (x9) Read/Write Chip Enables Output Enable OPTR I/O0L - I/O35L I/O0R - I/O35R Counter/ Address Registers Counter/ Address Registers CLOCKL* A0L - A14L Address Load Counter Enable Counter Reset CLOCKR* A0R - A14R Address Load Counter Enable Counter Reset * - Each port has one CLOCK pin, which synchronizes both the I/O control logic and the counter/address registers for that port. - The OPT pin on each port selects operation at 3.3V or 2.5V.

  8. Features and Benefits

  9. Application ExampleEthernet Switch Router Shared Buffer Memory Payload Data Switch Backplane ... CPU (Network Management) IDT 70V3579 Ethernet Controller & Transceiver Ethernet Controller & Transceiver 18 36 2.5V 3.3V FIFO FIFO FIFO FIFO Address and Control Data PHY PHY PHY PHY Benefits of the 70V3579: Independent, simultaneous random access on each port Bus Isolation (widths, clock domains) Synchronous Interface at 133 MHz supports bandwidth of 9.6 Gbps Flexibility to accommodate different bus widths and I/O voltages

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