Front-end Electronics for Strip Detectors (an ATLAS perspective on SLHC)

1. Front-end Electronics for Strip Detectors(an ATLAS perspective on SLHC) 2nd Trento Workshop on Advanced Silicon Radiation Detectors Trento, Italia 14-Feb-2006 A.A. Grillo SCIPP – UCSC Front-end Electronics for Strip Detectors2nd Trento Workshop on Advanced Si Rad Detectors

2. The ATLAS Strip Detector Readout • The present ATLAS strip detector readout IC (named ABCD) is fabricated on the DMILL biCMOS technology. • The front-end amplifier, shaper and discriminator in bipolar. • The back-end pipeline, readout, command decoder, etc. in CMOS. • The DMILL technology is no longer available and it would likely not be sufficiently rad-hard for the higher SLHC luminosity, at least not at the same radii. • A new technology must be chosen. Front-end Electronics for Strip Detectors2nd Trento Workshop on Advanced Si Rad Detectors

3. Deep Sub-micron CMOS a Possibility • One obvious possibility is a complete IC in deep sub-micron CMOS. • Radiation hardness of 0.25 mm CMOS has been demonstrated at levels sufficient for strip use at SLHC • Newer 0.13 mm technologies are now being evaluated and are most likely at least as rad-hard if not more. • A demonstration front-end circuit was designed and fabricated in 0.25 mm CMOS a few years ago and was shown to meet present ATLAS noise and timing requirements. • A proposal is now being discussed to build a CMOS replacement for the full ABCD chip to demonstrate feasibility and evaluate performance. Front-end Electronics for Strip Detectors2nd Trento Workshop on Advanced Si Rad Detectors

4. Demonstration Front-end CMOS Circuit J. Kaplon et al., 2004 IEEE Rome Oct 2004, use 0.25 mm CMOS Front-end Electronics for Strip Detectors2nd Trento Workshop on Advanced Si Rad Detectors

5. Past Experience • A biCMOS technology was ideal for the existing ATLAS readout IC because: • We have shown for past experiments that the bipolar technology has advantages over CMOS in power and performance for front-end amplification when the capacitive loads are high and the shaping times short. • ZEUS-LPS Tek-Z IC • SSC-SDC LBIC IC • ATLAS-SCT ABCD, CAFE-M, CAFE-P ICs • CMOS is the preferred technology for memory and logic circuits of the back-end. • BiCMOS technology afforded both of these optimizations in one IC. • Experience with commercial 0.25 mm CMOS has shown the advantage of using a volume commercial rather than a niche technology. Front-end Electronics for Strip Detectors2nd Trento Workshop on Advanced Si Rad Detectors

6. Technical Issues • The ATLAS-ID upgrade will put even greater constraints on power. • Can we meet power and shaping time requirements with deep sub-micron CMOS? • Achieving sufficient transconductance of the front-end transistor typically requires large bias currents. • The timing of the SLHC is not yet fixed. If this dictates a faster shaping time, the transconductancevs. power will become a bigger issue. • If past experience still applies, a bipolar front-end may be able to meet noise and timing requirements for less power than a CMOS solution. • Are there commercial biCMOS technologies that could meet all of our stringent requirements? Front-end Electronics for Strip Detectors2nd Trento Workshop on Advanced Si Rad Detectors

7. biCMOS with Enhanced SiGe • The market for wireless communication has now spawned many biCMOS technologies where the bipolar devices have been enhanced with a germanium doped base region (SiGe devices). • We have identified at least the following vendors: • IBM (at least 3 generations available) • STm • IHP, (Frankfurt on Oder, Germany) • Motorola • JAZZ • Advanced versions include CMOS with feature sizes of 0.25 mm to 0.13 mm. • The bipolar devices have DC current gains (b) of several 100 and fTs up to 200s of GHz. This implies very small geometries that could afford higher current densities and more rad-hardness. Growing number of fab facilities Front-end Electronics for Strip Detectors2nd Trento Workshop on Advanced Si Rad Detectors

8. Technical Questions • The changes that make SiGe Bipolar technology operate at 100s of GHz for the wireless industry coincide with the features that enhance performance for our application. • Small feature size increases radiation tolerance. • Extremely small base resistance (of order 10-100 W) affords low noise designs at very low bias currents. • Can these features help save power? • Will the SiGe technologies meet rad-hard requirements? Front-end Electronics for Strip Detectors2nd Trento Workshop on Advanced Si Rad Detectors

9. Inner Pixel Fluence [1014 neq/cm2] Mid-Radius Short Strips Outer-Radius “SCT” Radiation vs. Radius in Upgraded Tracker The usefulness of a SiGe bipolar front-end circuit will depend upon its radiation hardness for the various regions (i.e. radii) where silicon strip detectors might be used. Front-end Electronics for Strip Detectors2nd Trento Workshop on Advanced Si Rad Detectors

10. Tracker Regions Amenable for SiGe For the inner tracker layers, pixel detectors will be needed, and their small capacitances allow the use of deep sub-micron CMOS as an efficient readout technology. Starting at a radius of about 20 cm, at fluence levels of 1015 n/cm2, short strips can be used, with a detector length of about 3 cm and capacitances on the order of 5 pF. At a radius of about 60 cm, the expected fluence is a few times 1014 n/cm2, and longer strips of about 10 cm and capacitance of 15 pF can be used. It is in these two outer regions with sensors with larger capacitive loads where bipolar SiGe might be used in the front-end readout ASICs with welcome power savings while still maintaining fast shaping times. Front-end Electronics for Strip Detectors2nd Trento Workshop on Advanced Si Rad Detectors

11. Biasing the Analogue Circuit The analog section of a readout IC for silicon strips typically has a special front transistor, selected to minimize noise (often requiring a larger current than the other transistors), and a large number of additional transistors used in the shaping sections and for signal-level discrimination. The current for the front transistor is selected in order to achieve the desired transconductance (minimize noise). For the other bipolar devices, bias levels for the other transistors are determined to achieve the necessary rad-hardness, matching and shaping times. Depending upon the performance (especially radiation hardness) of the bipolar process, power savings could be realized in both the front transistor and in the other parts of the analogue circuit. Front-end Electronics for Strip Detectors2nd Trento Workshop on Advanced Si Rad Detectors

12. Evaluation of SiGe Radiation Hardness The Team D.E. Dorfan, A. A. Grillo, A. Jones, G.F. Martinez-McKinney, M. Mendoza, P. Mekhedjian, J. Metcalfe, H. F.-W. Sadrozinski, G. Saffier-Ewing, A. Seiden, E. N. Spencer, M. Wilder SCIPP-UCSC Collaborators: A. Sutton, J.D. Cressler, A.P. Gnana Prakash Georgia Tech, Atlanta, GA 30332-0250, USA F. Campabadal, S. Díez, C. Fleta, M. Lozano, G. Pellegrini, J. M. Rafí, M. Ullán CNM (CSIC),Barcelona S. Rescia et al.BNL Front-end Electronics for Strip Detectors2nd Trento Workshop on Advanced Si Rad Detectors

13. First SiGe High-rate Radiation Testing Radiation testing has been performed on some SiGe devices by our Georgia Tech collaborators up to a fluence of 1x1014 p/cm2 and they have demonstrated acceptable performance. (See for example: http://isde.vanderbilt.edu/Content/muri/2005MURI/Cressler_MURI.ppt) In order to extend this data to higher fluences, we obtained some arrays of test structures from our collaborator at Georgia Tech. These were from a b-enhanced 5HP (called 5AM) process from IBM. (i.e. the b was ~250 rather than ~100.) The parts were tested at UCSC and with the help of RD50 collaborators (Michael Moll & Maurice Glaser) they were irradiated in Fall 2004 at the CERN PS and then re-tested at UCSC. For expediency, all terminals were grounded during the irradiation This gives slightly amplified rad effects compared to normal biasing. Annealing was performed after initial post-rad testing. Front-end Electronics for Strip Detectors2nd Trento Workshop on Advanced Si Rad Detectors

14. ATLAS Upgrade Outer Radius Pre-rad 4.15 x 1013 1.15 x 1014 3.50 x 1014 Mid Radius Inner Radius 1.34 x 1015 3.58 x 1015 1.05 x 1016 Irradiated Samples Front-end Electronics for Strip Detectors2nd Trento Workshop on Advanced Si Rad Detectors

15. Radiation damage increases base current causing the gain of the device to degrade. Gain=Ic/Ib (collector current/base current) Radiation Damage Mechanism Forward Gummel Plot for 0.5x2.5 mm2 Ic,Ib vs. Vbe Pre-rad and After 1x1015 p/cm2 & Anneal Steps Collector current remains the same Ic , Ib [A] Base current increases after irradiation Vbe [V] • Ionization Damage (in the spacer oxide layers) • The charged nature of the particle creates oxide trapped charges and interface states in the emitter-base spacer increasing the base current. • Displacement Damage (in the oxide and bulk) • The incident mass of the particle knocks out atoms in the lattice structure shortening hole lifetime, which is inversely proportional to the base current. Front-end Electronics for Strip Detectors2nd Trento Workshop on Advanced Si Rad Detectors

16. Annealing of 0.5x2.5 mm2: Current Gain, b, vs. Ic Pre-rad and After 1x1015 p/cm2 & Anneal Steps Current Gain, b Ic [A] Annealing Effects Before Irradiation After Irradiation After Irradiation & Full Annealing We studied the effects of annealing. The performance improves appreciably. In the case above, the gain is now over 50 at 10mA entering into the region where an efficient chip design may be implemented with this technology. The annealing effects are expected to be sensitive to the biasing conditions. We plan to study this in the future. Front-end Electronics for Strip Detectors2nd Trento Workshop on Advanced Si Rad Detectors

17. Current Gain, b, vs. Ic for 0.5x10 mm2 Pre-rad and for All Fluences Including Full Annealing Current Gain, b Ic [A] Initial Results Before Irradiation Increasing Fluence Lowest Fluence Current Gain, b Highest Fluence After irradiation, the gain decreases as the fluence level increases. Performance is still very good at a fluence level of 1x1015 p/cm2. A typical Ic for transistor operation might be around 10 mA where a b of around 50 is required for a chip design. At 3x1015, operation is still acceptable for certain applications. Front-end Electronics for Strip Detectors2nd Trento Workshop on Advanced Si Rad Detectors

18. Universality of Results D(1/b) Post-rad & Anneal to Pre-rad @ Jc=10mA Ratio of Current Gain, b Post-rad & Anneal to Pre-rad @ Jc=10 mA 1/b(final) - 1/b(initial) Ratio b(final)/b(initial) Proton Fluence [p/cm2] Proton Fluence [p/cm2] Universal behavior independent of transistor geometry when compared at the same current density Jc. For a given current density D(1/b) scales linearly with the log of the fluence. This precise relation allows the gain after irradiation to be predicted for other SiGe HBTs. Note there is little dependence on the initial gain value. Front-end Electronics for Strip Detectors2nd Trento Workshop on Advanced Si Rad Detectors

19. Feasibility for ATLAS ID Upgrade • Qualifications for a good transistor: • A gain of 50 is a good figure of merit for a transistor to use in a front-end circuit design. • Low currents translate into increased power savings. At 1.34x1015 closer to the mid radius (20 cm), where short (3 cm) silicon strip detectors with capacitance around 5pF will be used, the collector current Ic is still good for a front transistor, which requires a larger current while minimizing noise. We expect better results from 3rd generation IBM SiGe HBTs. At 3.5x1014 in the outer region (60 cm), where long (10 cm) silicon strip detectors with capacitances around 15pF will be used, the collector current Ic is low enough for substantial power savings over CMOS! Front-end Electronics for Strip Detectors2nd Trento Workshop on Advanced Si Rad Detectors

20. IHP - Another SiGe Vendor • CNM has obtained a first set of test structures from IHP and is proceeding with that evaluation. • 2 Test chip wafer pieces with ~20 chips • 2 Technologies: • SGC25C (bipolar module equivalent to SG25H1) • SG25H3 (Alternative technology) • Edge effects: • Test chips came from edge of wafer • Will be solved in future samples • Irradiations with gammas to 10 Mrad and 50 Mrad have been performed. Neutrons and protons to be done. Front-end Electronics for Strip Detectors2nd Trento Workshop on Advanced Si Rad Detectors

21. Preliminary Results for IHP from CNM • IHP SGC25C SiGe technology • Bipolar transistors equivalent to SG25H1 technology (fT = 200 GHz) • No Annealing ! Front-end Electronics for Strip Detectors2nd Trento Workshop on Advanced Si Rad Detectors

22. Second IHP Technology • IHP SG25H3 SiGe technology • fT = 120 GHz, Higher breakdown voltages • Annealing after 50 Mrads: 48 hours, very good recovery • Very low gains before irradiation (edge wafer transistors) Front-end Electronics for Strip Detectors2nd Trento Workshop on Advanced Si Rad Detectors

23. Continuing Studies of IBM Technologies We are continuing the studies of three IBM technologies (5HP, 7HP and 8HP) using neutrons, gammas and protons. 8HP comes with0.13 mm CMOS 5AM & 5HP comes with 0.25 mm & 0.50 mm CMOS 5AM & 5HP comes with 0.25 mm & 0.50 mm CMOS Neutron irradiation is in progress at Ljubljana. Gammas will be done at BNL next month with protons to follow this spring. Front-end Electronics for Strip Detectors2nd Trento Workshop on Advanced Si Rad Detectors

24. IHP Design to Estimate Power of Upgrade Frontend • IHP has the SG25H1 200 GHz SiGe process available on Europractice. b is ~200. In parallel with radiation testing by Barcelona, UCSC is developing an eight channel amplifier/comparator with similar specifications to the present ABCD. • The x4 minimum transistor has base resistance of 51 W, 0.21 mm x 3.36 mm. 0.25 mm CMOS is also included. Extensive use is made of the 2.0 kW/ square unsilicided polysilicon resistor structure, since this is expected to be radiation resistant. • The purpose of this FE design is to estimate the low current bias performance of SiGe, and to see whether it can produce significant power savings. The target voltage bias level is 2 V. Front-end Electronics for Strip Detectors2nd Trento Workshop on Advanced Si Rad Detectors

25. Design Procedure Details • IHP provides a Cadence Kit, with support for both Diva and Allegro. • The bipolar devices are complete as provided, no editing allowed, with some hidden layers to protect IHP intellectual property. • Radiation hard annular NMOS transistor drawing is well supported. This is done by allowing 135 degree bends of Poly lines on Active in the DRC. There are included Virtuoso utilities that are needed for successful DRC. • Cadence Spectre does not DC converge well. Mentor has Eldo utility “Artist Link” that enables Eldo to run with Cadence schematic Composer. Eldo converges vigorously. Overall, the Cadence Kit is complete enough, and with the help of Eldo, is a good toolset. Front-end Electronics for Strip Detectors2nd Trento Workshop on Advanced Si Rad Detectors

26. Frontend Simulation Results Front-end Electronics for Strip Detectors2nd Trento Workshop on Advanced Si Rad Detectors

27. Power for the CMOS Front-End J. Kaplon et al., 2004 IEEE Rome Oct 2004, use 0.25 mm CMOS Can SiGe beatthese numbers? For CMOS: Input transistor: 300 mA, other transistors 330 mA (each 20 – 90 mA) Front-end Electronics for Strip Detectors2nd Trento Workshop on Advanced Si Rad Detectors

28. CHIP TECHNOLOGY FEATURE  0.25 mm CMOS ABCDS/FE J. Kaplon et al., (IEEE Rome Oct 2004)  IHP SG25H1 SCT-FE Preliminary design Power: Bias for all but front transistor 330 mA 0.8 mW = 30 mA(conservative) .06 mW  Power: Front bias for 25 pF load 300 mA 0.75 mW 150 mA 0.30 mW Power: Front bias for 7 pF load 120 mA 0.3 mW 50 mA 0.10 mW Total Power (7 pF) 2x1015 0.36 mW First Guess at Potential Power Savings Using similar estimates of bias settings and transistor counts, an estimate for power can be obtained. 1.1 mW 0.16mW Total Power (25 pF) 3x1014 1.5 mW Front-end Electronics for Strip Detectors2nd Trento Workshop on Advanced Si Rad Detectors

29. Conclusions on SiGe Evaluation So Far First tests of one SiGe biCMOS process indicate that the bipolar devices may be sufficiently rad-hard for the upgraded ATLAS tracker, certainly in the outer-radius region and even perhaps in the mid-radius region. A simulation estimate of power consumption for such a SiGe front-end circuit indicates that significant power savings might be achieved. More work is needed to both confirm the radiation hardness and arrive at more accurate estimates of power savings. In particular, with so many potential commercial vendors available, it is important to understand if the post-radiation performance is generic to the SiGe technology or if it is specific to some versions. Front-end Electronics for Strip Detectors2nd Trento Workshop on Advanced Si Rad Detectors

30. Work Ahead • Along with our collaborators, we plan two parallel paths of work. • We will complete the irradiation studies of several SiGe processes. In particular, we plan to test at least the IBM 5HP, IBM 7HP, IBM 8HP, IHP SGC25C (eq. to SG25H1), IHP SG25H3 and IHP SGB25VD. • CNM will focus on the IHP technologies. • UCSC on IBM. • To obtain a better handle on the true power savings, we will submit an IHP 8 channel amplifier/comparator in spring 2006. This work is in parallel with IHP radiation characterization. • The BNL LAr group is also interested in SiGe and has joined the team to complete the evaluation. • Once the SiGe evaluation is complete, a choice can be made between SiGe bipolar or CMOS for the front-end to be married with the CMOS backend. Front-end Electronics for Strip Detectors2nd Trento Workshop on Advanced Si Rad Detectors