System Synthesis for Networks of Programmable Blocks

1. System Synthesis for Networks of Programmable Blocks Ryan Mannion, Harry Hsieh, Susan Cotterell, Frank Vahid* Department of Computer Science and Engineering University of California, Riverside {rmannion, harry, susanc, vahid}@cs.ucr.edu; http://www.cs.ucr.edu/eblocks * Also with the Center for Embedded Computer Systems at UC Irvine This work is being supported by the National Science Foundation and a Department of Education GAANN Fellowship

2. Introduction • Sensor networks are emerging as an important general computing domain • Small inexpensive battery-powered sense and compute nodes • Tens to thousands of nodes • Wired or wireless communication • Stringent requirements (power, cost, size) Environmental Monitoring http://www.greatduckisland.net/ http://today.cs.berkeley.edu/retreat-6-03/ Military Applications http://robotics.eecs.berkeley.edu/~pister/29Palms0103/ Home Automation http://www.smarthome.com Structure/Building Monitoring http://www.mrr.dot.state.mn.us/research/MnROAD_Project/MnROADProject.asp Medical Monitoring http://www.eecs.harvard.edu/~mdw/proj/codeblue/

3. Introduction • Potential sensor network application developers may not be computer programmers • Instead, engineers, scientists, office workers, homeowners, etc. • Existing programmable nodes • Flexible, but require programming • Existing off-the-shelf end applications • Specialized, so hard to customize • Expensive due to small volumes • Our solution – eBlocks • Enables non-programming users to create simple but useful customized sensor network applications http://www.xbow.com/ Flexible, hard to program Photo: Jason Hill http://www.dustnetworks.com/ Easy to use, inflexible http://www.smarthome.com

4. 123456789 Splitter Prolonger Splitter 1 1 0 0 Inverter Inverter Splitter LED LED LED LED 123456789 LED LED Prolonger 2-Input Logic C Code C Code Splitter PROG PROG Button Button Talk Outline • Brief introduction to eBlocks • Synthesis • Motivation • Methodology • Experiments eBlock capture tool Synthesis Network nodes and programs

5. 1 1 0 0 Magnetic Contact Switch Motion Sensor LED Toggle 2-Input Logic C Code C Code Electric Relay Tripper Light Sensor Button Splitter eBlocks Overview • eBlocks (UC Riverside) • Began as low-cost reusable basic building blocks • Enables non-programmers to create basic but useful sensor-based applications • Function of each block is pre-defined • Block types: • Sensors – motion, light, contact, etc. • Output – led, electric relay, beeper, etc. • Compute – logic, prolong, toggle, etc. • Basic configuration required (dials, switches) • Communicate – wireless point-to-point link • Users merely connect blocks to create working customized application • Evolving into a “spatial” programming methodology for sensor networks with programmable nodes • CODES/ISSS’03, SECON’04, CHI’05, SPOTS’05

6. 1 1 0 0 Magnetic Contact Switch Magnetic Contact Switch Need something to indicate garage open at night – use led We want to detect night – use light sensor Need a function of light sensor output and contact switch output – use Logic Block LED LED A’B’ A’B’ Configure Logic Block to turn led on when it’s night and when door is open We want to know if garage door open – use contact switch 2-Input Logic 2-Input Logic 2-Input Logic C Code C Code Plug pieces together and the system is done! Light Sensor Light Sensor Creating an application with eBlocks • Create an application to detect if the garage door is left open at night

7. 1 1 0 0 Tripper Magnetic Contact Switch LED A’B’ A’B Motion Sensor Garage Door Open At Night Detector Sleepwalker at Night Alarm 2-Input Logic 2-Input Logic 2-Input Logic C Code C Code 1 2 3 4 5 6 7 8 9 Prolonger Light Sensor Light Sensor Motion Sensor Beeper Beeper Light Sensor Button A+B Motion Sensor 1 2 3 4 5 6 7 8 9 eBlock to Camera Interface 2-Input Logic Motion Sensor Prolonger A+B Motion on Property Detector Animal Videoing System Building eBlocks Systems • The same basic blocks can be used in a variety of applications

8. 1 2 3 4 5 6 7 8 9 1 0 Prolonger Splitter Inverter 1 1 0 0 1 2 3 4 5 6 7 8 9 2-Input Logic Splitter LED LED LED LED Prolonger 1 0 Inverter C Code C Code PROG Button Button Motivation - Programmable Blocks • Programmable blocks are desirable • Allows for smaller designs • Results in reduced cost and power consumption • Limitation - Programmable blocks hard to use by non-programmers (requires “2.5 Ph.D.s” – SECON’04 keynote) • Solution – eBlocks capture tool, automated synthesis generates equivalent programs • eBlocks limit potential functionality • But range is still useful, and accessible to non-programmers

9. Design Entry/ Simulation Synthesis Partitioning Code Generation GUI 1 1 0 0 Interpreter C Code C Code Synthesis • Synthesis tool • Must map network of pre-defined blocks to programmable blocks • Three stages • Design entry/simulation • Synthesis -- Partitioning • Synthesis -- Code generation

10. 1 1 0 0 Design Entry/ Simulation Synthesis C Code C Code Partitioning Code Generation GUI Interpreter Design Entry/Simulation • User specifies and tests block design • Java-based simulator • Blocks added to workspace by dragging blocks from “Available eBlocks” tray • Connections created by drawing lines between blocks • User can create, experiment, test and configure design

11. 123456789 Splitter Prolonger Splitter 1 1 1 1 0 0 0 0 Inverter Inverter Splitter LED LED LED LED 123456789 LED LED Prolonger 2-Input Logic Design Entry/ Simulation C Code C Code Partitioning Code Generation Splitter GUI PROG PROG Interpreter Button Button Synthesis Synthesis -- Partitioning • Mapping of pre-defined blocks to programmable blocks • Problem – map pre-defined blocks to minimum number of programmable blocks • Intermediate blocks (non-sensor, non-output) • We assume 2-input/2-output programmable block available • Partitioning problem differs from existing problems • Classic bin-packing or knapsack algorithms • But we need to be conscious of two constraints – number of inputs and number of outputs • Two-dimensional bin-packing problem (cutting stock problem) • But number of inputs and outputs of programmable block are mutually independent • FPGA synthesis, namely DAG covering • But we do not require all nodes to be covered • Our goal is to minimize block count, many focus on minimum-delay solutions or approximations • Many solutions permit replications – contrary to our goal of minimizing block count

12. 4 7 10 1 3 1-input / 2-output 11 5 1 1 0 0 9 8 12 2 6 4 7 10 1 3 2-input / 3-output 11 5 9 8 12 Invalid configuration - packing terminated 2 6 Design Entry/ Simulation C Code C Code 4 7 10 Partitioning Code Generation 1 3 2-input / 2-output GUI 11 5 9 8 12 2 6 Interpreter Synthesis Synthesis -- Partitioning Strategies • Exhaustive • Search every combination of n blocks into n programmable blocks • Extremely long run times (hours) • Aggregation • Clusters nodes into subgraphs, continue adding blocks until unable to fit into programmable block • Unable to take advantage of convergence thus yields non-optimal results • Developed a new heuristic – PareDown • Based on a decomposition method • Takes advantage of convergence • Unconstrained by depth at which heuristic looks ahead • Runtime complexity O(n2)

13. 1 1 0 0 LED LED LED Design Entry/ Simulation C Code C Code C Code C Code Partitioning Code Generation Splitter GUI PROG PROG Interpreter Button Synthesis Synthesis -- Code Generation • For each partition a syntax tree is generated to represent equivalent functionality of the partition • Able to generate C code for each partition to download unto a programmable block • Simulator’s interpreter able to evaluate syntax tree and simulate corresponding behavior

14. Initial # of internal blocks • All designs yield optimal partition • Executed in reasonable amount of time Using exhaustive search, resulting # of internal blocks after partitioning • Ran decomposition heuristic to obtain • # of inner nodes • # of programmable nodes • runtime Of the resulting # of internal block, the # that are programmable blocks Corresponding runtime Notice – unable to partition larger designs (did not finish after hours) Experiments - Real Designs • Executed decomposition and exhaustive search algorithms • 2 GHz AMD Athlon XP PC • Partitioned 15 real designs, developed independently from our purposes of synthesis

15. Randomly generated designs with varying internal block counts Within 15% of optimal (within 1 programmable block for most cases) • Ran exhaustive search to obtain • # of inner nodes • # of programmable nodes • runtime • Ran decomposition heuristic to obtain • # of inner nodes • # of programmable nodes • runtime Maintains reasonable runs times at even at larger sizes Results - Random Designs • Nearly 10,000 randomly-generated designs were also tested

16. 123456789 Splitter Prolonger Splitter 1 1 0 0 Inverter Inverter Splitter LED LED LED LED 123456789 LED LED Prolonger 2-Input Logic C Code C Code Splitter PROG PROG Button Button Conclusions and Future Work • Developed synthesis tool that: • Converts eBlocks network to minimum number of programmable nodes • With accompanying C code • Uses new partitioning heuristic that is fast and near-optimal • Present/Future Work • Variety of programmable blocks • Also consider more criteria (i.e. input/output, cost, power, delay) • Introduce higher-level eBlocks for more powerful capture • Apply tool to real applications • Pro-active healthcare (w/ Intel) • Agricultural monitoring (w/ Isca) • Environment monitoring (w/ UCR/UCLA)

17. Thank you for your attention.