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ISA of MIPS

ISA of MIPS. Module 1.1 Elements of computer systems. Computer System = Hardware + System Software + Application Software. System Software: Operating System, Device Drivers, Loaders, Linkers, Compilers, Assemblers, Editors, ….

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ISA of MIPS

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  1. ISA of MIPS Module 1.1 Elements of computer systems

  2. Computer System = Hardware + System Software + Application Software System Software: Operating System, Device Drivers, Loaders, Linkers, Compilers, Assemblers, Editors, …. Application Software: Web browsers, user-specific applications, ….. Source: H&P-3 (Hennesy & Patterson, 3rd Edition)

  3. Levels of Abstraction MIPS Assemble Language Source: Prof. Cheung’s Course Notes (Imperial College, London)

  4. Instruction Set Architecture (ISA) • ISA is an abstraction for the Software to interface with the Hardware. • Advantage: Multiple implemenations for the same ISA. • Ex: AMD Opteron 64 and Intel Pentium 4 are different Implementations of the ISA. • “. . . the attributes of a [computing] system as seen by the programmer, i.e. the conceptual structure and functional behavior, as distinct from the organization of the data flows and controls the logic design, and the physical implementation.” • Amdahl, Blaaw, and Brooks, 1964

  5. What does ISA consists of? • Instruction Set • Instruction Format • Data Types and Data Structures (Integer, Floating Point, …) • Addressing Modes • Exceptional Conditions • …….

  6. Types of ISA in MIPS • Broadly MIPS consists of three types of ISA: • R-Type : arithmetic-logical instructions: add, sub, and, or, slt • I-type : memory-reference instructions: lw, sw • J – type : control flow instructions: beq, j

  7. Types of ISA in MIPS • Broadly MIPS consists of three types of ISA: • R-Type : arithmetic-logical instructions: add, sub, and, or, slt • I-type : memory-reference instructions: lw, sw • J – type : control flow instructions: beq, j

  8. Instruction Formats • R-Type: • Eg ADD $r1, $r2, $r3 • $r1 <- $r2 + $r3 op rs rt rd shamt funct 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits • op: opcode • rs: The first register source operand • rt: The second register source operand • rd: The register destination operand, it gets the result of the operation. • shamt : Shift amount ( shift instructions) • funct: Function. This field selects the specific variant of the operation in the op field. Also called function code

  9. Instruction Formats • I-type • Eg : LW $r1, C ( $r2) • $r1 <- contents ( $r2+C) • ADDI $r1, $r2, C • $r1 <- $r2 + sign extend(C) op rs rt address 6 bits 5 bits 5 bits 16 bits • op: opcode • rs: The first register source operand • rt: The destination register • address: For load word it means that it can load any address within ± 215 bytes. For other operations like ADDI it represents the 16 bit constant value to be used for addition.

  10. Instruction Formats • J-type • J , target • Jump to instruction at target. op target 6 bits 26 bits op: opcode target: Target address of instruction memory to which you wish to jump

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