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Interaction in Language Based System Level Design Using an Advanced Compiler Generator Environment

Interaction in Language Based System Level Design Using an Advanced Compiler Generator Environment. Introduction to Behavioral Synthesis. Facts: Design complexity is increasing Time to market is forced to decrease. Possible Solution:

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Interaction in Language Based System Level Design Using an Advanced Compiler Generator Environment

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  1. Interaction in Language Based System Level Design Using an AdvancedCompiler Generator Environment IEEE Computer Society Annual Workshop on VLSI (WVLSI '00) 27-28April 2000 Orlando, Florida. Interaction in Language Based System Level Design Using an Advanced Compiler Generator Environment Ioannis Poulakis, George Economakos and Panayiotis Tsanakas

  2. Introduction to Behavioral Synthesis Facts: • Design complexity is increasing • Time to market is forced to decrease Possible Solution: • Behavioral Synthesis: The transformation of behavioral circuit descriptions into register-transfer level (RTL) structural descriptions that satisfy user defined constraints (speed, area, power consumption) • User Interaction Open Problems: • Many alternative approaches (environments, languages, technologies) • No theoretical background • Most of the problems are NP-complete • Designer interaction is needed IEEE Computer Society Annual Workshop on VLSI (WVLSI '00) 27-28April 2000 Orlando, Florida. Interaction in Language Based System Level Design Using an Advanced Compiler Generator Environment Ioannis Poulakis, George Economakos and Panayiotis Tsanakas

  3. Introduction to Attribute Grammars (AGs) • Widely used semantic formalism for traditional compiler construction • Attach semantic actions and conditions to syntactic rules • Automated evaluation environments • Formal specification and implementation tool Introduction to VHDL • General purpose Hardware Description Language (HDL) for design capture • Supports different levels of design abstraction • IEEE standard • Most EDA tools offer VHDL aware modules IEEE Computer Society Annual Workshop on VLSI (WVLSI '00) 27-28April 2000 Orlando, Florida. Interaction in Language Based System Level Design Using an Advanced Compiler Generator Environment Ioannis Poulakis, George Economakos and Panayiotis Tsanakas

  4. AG driven Behavioral Synthesis Attribute Grammar with Behavioral Synthesis Transformations Transformed Control and Data Flow Graph (CDFG) Attribute Grammar Evaluator Generator Synthesizable VHDL Attribute Grammar Driven Hardware Compiler Behavioral Description IEEE Computer Society Annual Workshop on VLSI (WVLSI '00) 27-28April 2000 Orlando, Florida. Interaction in Language Based System Level Design Using an Advanced Compiler Generator Environment Ioannis Poulakis, George Economakos and Panayiotis Tsanakas

  5. Proposed Behavioral Description Attributes I • step oi[n] • Assigns the control step in which operation oi will be executed if possible. operation operand1operator [number]operand2  operation.s_cs=valid(operation.step) ? number : operation.CSA • c_step oi[&n] • Assigns the control step in which the referential operation will be executed. operation operand1operator [&number] operand2 operation.s_cs= operation.step • delay oi[^n] • Delay the execution of oi n control steps. operation operand1operator [^delay]operand2 operation.s_cs=delay+operation.CSA; IEEE Computer Society Annual Workshop on VLSI (WVLSI '00) 27-28April 2000 Orlando, Florida. Interaction in Language Based System Level Design Using an Advanced Compiler Generator Environment Ioannis Poulakis, George Economakos and Panayiotis Tsanakas

  6. Proposed Behavioral Description Attributes II • group oi[g n] - Defines a group and adds operator oi in group n operation  operand1operator [g number]operand2 oi[g n step] - Defines a group, adds operator oi in group n and assigns the control step of the group to step operation  operand1operator [g number1 number2]operand2 • distance oi[d n (<,<=,=,>=,>) group ] • Defines the distance in control steps between an operator and a group. operation  operand1operator [d number1 (<,<=,=,>=,>)number2]operand2 IEEE Computer Society Annual Workshop on VLSI (WVLSI '00) 27-28April 2000 Orlando, Florida. Interaction in Language Based System Level Design Using an Advanced Compiler Generator Environment Ioannis Poulakis, George Economakos and Panayiotis Tsanakas

  7. Attributed Behavior Scheduling Algorithm for each operation oi ifcstep(oi ,n) ScheduledStep(oi ) = n else if step(oi ,n) if n is a valid control step ScheduledStep(oi ) = n else ScheduledStep(oi ) = CSA(oi ) else if delay(o i ,n) ScheduledStep(oi ) = n+CSA(oi ) else if group(oi ,x j ) ScheduledStep(oi ) = MAX(ScheduledStep(ok),8ok 2x j ) IEEE Computer Society Annual Workshop on VLSI (WVLSI '00) 27-28April 2000 Orlando, Florida. Interaction in Language Based System Level Design Using an Advanced Compiler Generator Environment Ioannis Poulakis, George Economakos and Panayiotis Tsanakas

  8. Attributed Behavior Scheduling Algorithm else if distance(oi ,x j ) if relation=='<' ScheduledStep(oi ) = min distance() considering all ok 2x j else if relation=='>' ScheduledStep(o i ) = max distance() considering all ok 2x j else if relation=='=' ScheduledStep(oi ) = exact distance() considering all ok 2x j else /* no attribute applicable */ ScheduledStep(oi ) = CSA(oi ) IEEE Computer Society Annual Workshop on VLSI (WVLSI '00) 27-28April 2000 Orlando, Florida. Interaction in Language Based System Level Design Using an Advanced Compiler Generator Environment Ioannis Poulakis, George Economakos and Panayiotis Tsanakas

  9. Experimental Results Fast transitory effects in electric power systems Where x: the vector of the unknown values u: the vector of the known values The equation (1) can be solved using the trapezoid integration norm, in which the integration step remains continually fixed. Then equation (1) can be reformed in (2). From (2) we conclude that the unknown vector x the time t arises from the value of x of the time t-Δt and the value of the source vectoru at both times t, Δt. Using the equations (3), (4), (5) we can always (at any value of time t) estimate vector x even if there are nonlinear equations. In this case the matrix [A] depends on x, these equations are solved with recursive process, and the matrix [A(x(t))] is refreshed for each value of t related to x(t) until it is converged. IEEE Computer Society Annual Workshop on VLSI (WVLSI '00) 27-28April 2000 Orlando, Florida. Interaction in Language Based System Level Design Using an Advanced Compiler Generator Environment Ioannis Poulakis, George Economakos and Panayiotis Tsanakas

  10. Estimation of inverse matrix A-1 of A Simple case of a [3x3] matrix A IEEE Computer Society Annual Workshop on VLSI (WVLSI '00) 27-28April 2000 Orlando, Florida. Interaction in Language Based System Level Design Using an Advanced Compiler Generator Environment Ioannis Poulakis, George Economakos and Panayiotis Tsanakas

  11. Estimation of inverse table A-1 [3x3] Program inverse_A; Begin D:=a1*b2*c3+b1*c2*a3+c1*a2*b3-a3*b2*c1- b3*c2*a1-c3*a2*b1; if (D>0) Begin A1:=b2*c3-b3*c2; A2:= b3*c1-b1*c3; A3:=b1*c2-b2*c1; B1:= a3*c1-a2*c3; B2:=a1*c3-a3*c1; B3:= a3*c1-a1*c3; C1:=a2*b3-a3*b2; C2:= a3*b1-a1*b3; C3:=a1*b2-a2*b1; a11:=A1/D; a21:=B1/D; a31:=C1/D; b11:=A2/D; b21:=B2/D; b31:=C3/D; c11:=A3/D; c21:=B3/D; c31:=C3/D; End End. Program inverse_A; Begin D:=a1*b2*c3+b1*c2*a3+c1*a2*b3-a3*b2*c1- b3*c2*a1-c3*a2*b1; if (D>0) Begin A1:=b2*[&3][g 1]c3-b3*[g 1]c2; A2:= b3*[g 1]c1-b1*[g 1]c3; A3:=b1*[g 1]c2-b2*[g 1]c1; B1:= a3*[&4][g 2]c1-a2*[g 2]c3; B2:=a1*[g 2]c3-a3*[g 2]c1; B3:= a3*[g 2]c1-a1*[g 2]c3; C1:=a2*[&5][g 3]b3-a3*[g 3]b2; C2:= a3*[g 3]b1-a1*[g 3]b3; C3:=a1*[g 3]b2-a2*[g 3]b1; a11:=A1/D; a21:=B1/D; a31:=C1/D; b11:=A2/D; b21:=B2/D; b31:=C3/D; c11:=A3/D; c21:=B3/D; c31:=C3/D; End End. Normal Algorithmic description Attributed behavior Algorithmic description IEEE Computer Society Annual Workshop on VLSI (WVLSI '00) 27-28April 2000 Orlando, Florida. Interaction in Language Based System Level Design Using an Advanced Compiler Generator Environment Ioannis Poulakis, George Economakos and Panayiotis Tsanakas

  12. Scheduling tree using ASAP Scheduling Algorithm IEEE Computer Society Annual Workshop on VLSI (WVLSI '00) 27-28April 2000 Orlando, Florida. Interaction in Language Based System Level Design Using an Advanced Compiler Generator Environment Ioannis Poulakis, George Economakos and Panayiotis Tsanakas

  13. Scheduling tree using Attributed Behavior Scheduling Algorithm IEEE Computer Society Annual Workshop on VLSI (WVLSI '00) 27-28April 2000 Orlando, Florida. Interaction in Language Based System Level Design Using an Advanced Compiler Generator Environment Ioannis Poulakis, George Economakos and Panayiotis Tsanakas

  14. Attributed Behavior scheduling Algorithm VS Normal Scheduling ASAP 18 to 24 multipliers 9 subtractors 3 adders 9 control steps Attributed Behavior scheduling Algorithm 6 multipliers 3 subtractors 3 adders 7 control steps • 12 multipliers and 6 subtractors less • 2 control steps faster IEEE Computer Society Annual Workshop on VLSI (WVLSI '00) 27-28April 2000 Orlando, Florida. Interaction in Language Based System Level Design Using an Advanced Compiler Generator Environment Ioannis Poulakis, George Economakos and Panayiotis Tsanakas

  15. Summary • All the attributes can be used over any scheduling algorithm regardless the synthesis tool. • The user can supplement scheduling heuristics with his implementation preferences. (User • interaction is increased). • High-Level language specification accommodates design productivity and provides greater • reuse of design specifications. • The specification is independent of the target technology • Design life is likely to increase. IEEE Computer Society Annual Workshop on VLSI (WVLSI '00) 27-28April 2000 Orlando, Florida. Interaction in Language Based System Level Design Using an Advanced Compiler Generator Environment Ioannis Poulakis, George Economakos and Panayiotis Tsanakas

  16. THANK YOU FOR YOUR ATTENTION IEEE Computer Society Annual Workshop on VLSI (WVLSI '00) 27-28April 2000 Orlando, Florida. Interaction in Language Based System Level Design Using an Advanced Compiler Generator Environment Ioannis Poulakis, George Economakos and Panayiotis Tsanakas

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