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IP Core-based SoC Testing in VPI Environment

IP Core-based SoC Testing in VPI Environment. Pedram Riahi Zain Navabi ECE Department, Northeastern University. Contents. Introduction Traditional Approaches Feasibility Methodologies Implementation Future Works. Introduction Core-based SoC Testing Scenario. Core-Level Chip-Level.

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IP Core-based SoC Testing in VPI Environment

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  1. IP Core-based SoC Testingin VPI Environment Pedram Riahi Zain Navabi ECE Department, Northeastern University

  2. Contents • Introduction • Traditional Approaches • Feasibility • Methodologies • Implementation • Future Works Northeastern University

  3. IntroductionCore-based SoC Testing Scenario • Core-Level • Chip-Level Northeastern University

  4. IntroductionGoal Northeastern University

  5. Traditional ApproachesPresent Solution • Cores with Internal Parallel Scan • Wrapper Parallel Scan for Cores • Embedded Memory BIST • Other DFT Features Northeastern University

  6. Traditional ApproachesPresent Solution Problems • IP Core (Black Box) • Core-Level Testing • Wrapper • Delay • Area • Chip-Level Testing • Non-optimal Test Vector Set • Tester Time Northeastern University

  7. Traditional ApproachesIdeal Solution • IP Core (Compiler Intermediate Format) • Transparent via VPI while Protecting Core IP • Collapsed Chip-Level Fault List • Chip-Level Testing • Optimal Test Vector Set Northeastern University

  8. FeasibilityFault List / Graph Extraction in VPI • Fault Model • Stuck-at Fault • Bridging Fault • Delay Fault • Extracting Fault List • Net/Reg • Fault List Collapsing • Extracting Design Graph • Connections • Gates Northeastern University

  9. FeasibilityBuilding Block Components • Checking the Feasibility of Implementing Various General-Purpose Fault Simulation and Test Generation Algorithms without Necessarily Presenting a Specific Methodology. • Paving the Path for Adding other Specific-Purpose Test Applications. Northeastern University

  10. FeasibilityFault Simulation Algorithms • Implemented • Serial • Deductive • Critical-Path Tracing • Unimplemented • Parallel • Parallel-Pattern Single Fault Propagation • Under Implementation • Concurrent/Differential Northeastern University

  11. FeasibilitySerialFault Simulation • Stuck-at Fault • Fault Injection • Callback • Force • Fan-out • Fixed Automatically • Fault List • File-based I/O • Pointer-based Linked-List • Node Name • Node Handle Northeastern University

  12. FeasibilityGraph Extraction • Connections • Drivers • Loads • Gate Type • Output Cones • Graph List • Pointer-based • Bi-directional • Nodes: Nets/Regs • Arches: Gates Northeastern University

  13. FeasibilityDeductiveFault Simulation • Stuck-at Fault • Two-Value • Three-Value • Fan-out • Fault List • Pointer-based • Arches Carry out Internal Fault Lists Northeastern University

  14. FeasibilityCritical-Path TracingFault Simulation • Combinational Circuits • Stuck-at Fault • Fan-out • Fault List • Pointer-based • Arches Carry out both Sensitive and Critical Statuses Northeastern University

  15. FeasibilityTest Generation Algorithms • Implemented • Random Pattern • Pseudo Random Pattern • Under Implementation • D-Algorithm • PODEM Northeastern University

  16. MethodologiesUsing Building Blocks • Hierarchical Fault Simulation • Flat (Structural) • Mixed-Level (Behavioral-Structural) • Required Pre- and Post-Synthesis Compiler Intermediate Formats • Level of Granularity • Threshold • Module-based • Core-based • The Higher Behavioral Level, The Better • Buffers • Fixed Automatically Northeastern University

  17. MethodologiesMixed-Level Fault Simulation • One-Hot • Can be Part of the Synthesis Process (Automatic) Northeastern University

  18. MethodologiesMixed-Level Fault Simulation Northeastern University

  19. MethodologiesUsing Building Blocks • Hierarchical Test Generation • RPTG • Color-Coded Pseudo Random • Randomly Find one or More Base Test Vector(s) Detecting Faults of a Specific Region • Level of Sensitivity • Threshold • Module-based • Core-based Northeastern University

  20. MethodologiesColor-Coded Pseudo Random Pattern Test Generation Northeastern University

  21. ImplementationTestbenches module grader_p_c0017; wire G1,G2,G3,G4,G5, G16,G17; integer i, j, flag, dummy, depth, scbar; reg [4:0] vectorset [1:10]; reg [4:0] vector; wire [1:0] result; assign {G1,G2,G3,G4,G5} = vector; assign result = {G16,G17}; c17 mut (G1,G16,G17,G2,G3,G4,G5); // Fault Simulation initial depth = 10; initial scbar = 0; initial $readmemb(“ISCAS85/c0017.dat”, vectorset); `include “…” endmodule Northeastern University

  22. ImplementationSerial Fault Simulation Initial begin dummy = $SFS("SFS_faultlist"); dummy = $SFS("SFS_outlist", depth, result); if (scbar == 1) #0 dummy = $SFS("SFS_readstatus"); for (i=1;i<=depth;i=i+1) begin vector = vectorset[i]; #200; dummy = $SFS("SFS_saveoutput", i, result); end while ($SFS("SFS_morefault") == 0) begin if (scbar == 1) dummy = $SFS("SFS_restorestatus"); dummy = $SFS("SFS_faultinjection"); flag = 1; i = 1; while (i<=depth & flag!=0) begin vector = vectorset[i]; #200; i = i + 1; if ($SFS("SFS_compareoutput", i-1, result) != 0) begin dummy = $SFS("SFS_updatefaultlist"); flag = 0; end end dummy = $SFS("SFS_faultrelease"); end dummy = $SFS("SFS_report"); $finish; end Northeastern University

  23. ImplementationDeductive Fault Simulation initial begin dummy = $DFS("DFS_faultlist"); dummy = $DFS("DFS_graph"); i = 1; while (i<=depth) begin vector = vectorset[i]; #200; dummy = $DFS("DFS_deduct"); i = i + 1; end dummy = $DFS("DFS_report"); $finish; end Northeastern University

  24. ImplementationCritical-Path Tracing Fault Simulation initial begin dummy = $CFS(“CFS_faultlist"); dummy = $CFS(“CFS_graph"); i = 1; while (i<=depth) begin vector = vectorset[i]; #200; dummy = $CFS(“CFS_critical"); i = i + 1; end dummy = $CFS(“CFS_report"); $finish; end Northeastern University

  25. ImplementationRandom Pattern Test Generation 1 $faultlist("FaultList.dat"); while ($faultcoverage("FaultList.dat", coverage) == 0) begin if (doread == 1) #0 $readstatus("Status.dat"); $randomvector("Random.dat", insize, depth); $readmemb("Random.dat", vectorset); for (i=1;i<=depth;i=i+1) begin vector = vectorset[i]; #200 $saveoutput("TrueOut.dat", result); end j = 0; while ($morefault("FaultList.dat") == 0) begin if (doread == 1) $restorestatus("Status.dat"); $faultinjection("FaultList.dat", 1); flag = 1; i = 1; while (i<=depth & flag!=0) begin vector = vectorset[i]; #200 if ($compareoutput("TrueOut.dat", i, result) != 0) begin $updatefaultlist("FaultList.dat", 1); flag = 0; if (i > j) j = i; end i = i + 1; end $faultinjection("FaultList.dat", 2); end Northeastern University

  26. ImplementationRandom Pattern Test Generation 2 if ($decide("TrueOut.dat", "FaultList.dat", limit) == 0) begin $restorestatus("Status.dat"); $updatefaultlist("FaultList.dat", 3); if (s_cbar == 1) doread = 0; end else begin $savevector("Random.dat", "VectorSet.dat", j); $updatefaultlist("FaultList.dat", 2); if (s_cbar == 1) begin if (j < depth) begin $restorestatus("Status.dat"); for (i=1;i<=j;i=i+1) begin vector = vectorset[i]; #200; end end doread = 1; end end end $finish; Northeastern University

  27. Future WorksUnder Process • Concurrent and Differential Fault Simulation Algorithms • D-Algorithm and PODEM, therefore, Improving Test Generation Algorithms • Looking Forward to Assertion-based Verification Northeastern University

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