IKI10230 Pengantar Organisasi Komputer Bab 12: Memori

1. IKI10230Pengantar Organisasi KomputerBab 12: Memori Sumber:1. Paul Carter, PC Assembly Language2. Hamacher. Computer Organization, ed-53. Materi kuliah CS61C/2000 & CS152/1997, UCB 19 Mei 2004 L. Yohanes Stefanus (yohanes@cs.ui.ac.id)Bobby Nazief (nazief@cs.ui.ac.id) bahan kuliah: http://www.cs.ui.ac.id/kuliah/POK/

2. Memori: Tempat Penyimpanan Data Keyboard, Mouse Computer Processor (active) Memory (passive) (where programs, data live when running) Devices Input Control (“brain”) Disk(permanentstorages) Datapath (“brawn”) Output Display, Printer

3. Connection: Memory - Processor Processor k-bit address bus Memory Sampai 2kaddressable locations MAR n-bit data bus Panjang word = n bits MDR Control lines, R/W, MFC, etc.

4. Organisasi Internal Memori • Bentuk array: terdiri dari sel memori • Sel berisi 1 bit informasi • Baris dari sel membentuk untaian satu word • Contoh: 128 x 8 memori • memori mengandung 128 word • setiap word terdiri dari 8 bit data • Kapasitas memori: 128 x 8 = 1024 bit • Address Decoder digunakan untuk memilih baris word mana yang akan diakses • alamat merupakan indeks dari baris pada array tersebut

5. Organisasi Memori: 1-level-decode SRAM (128 x 8) Word  8 bit data b7 b7’ b1 b1’ b0 b0’ W0 Address decoder W1 A0 A1 memory cells A6 W127 128 words R/W’ sense/write amps sense/write amps sense/write amps CS Input/output lines d7 d1 d0

6. Static RAM (SRAM) • SRAM dapat menyimpan “state” (isi RAM) selama terdapat “tegangan” power supply • Sangat cepat, 10 nano-detik • Densitas (bits per chip) rendah  memerlukan 6 transistor per-sel mahal • Pilihan teknologi untuk memori yang sangat cepat dengan kapasitas kecil  cache

7. Review: Static RAM Cell 6-Transistor SRAM Cell • Write: 1. Drive bit lines sesuai dengan bit (mis. b = 1, b’ = 0) 2. Select row  store nilai b dan b’ menjadi state latch • Read: • Precharge (set) bit lines high • Select row 3. Sense amp mendeteksi bit lines mana yang low state bit • Latch  menyimpan state 1 bit • Transistor T bertindak sebagai switch • Contoh: state 1 • Latch dapat berubah dengan: • put bit value pada b dan b’ • word line pull high (select) word (row select) 0 1 T T 0 1 b’ b

8. Dynamic RAM (DRAM) • Slower than SRAM • access time ~60 ns (paling cepat: 35 ns) • Nonpersistant • every row must be accessed every ~1 ms (refreshed) • Densitas tinggi: 1 transistor/bit • Lebih murah dari SRAM • ~$1/MByte [2002] • Fragile • electrical noise, light, radiation • Pilihan teknologi memori untuk kapasitas besar dan “low cost”  main memory

9. Review: 1-Transistor Memory Cell (DRAM) • Write: • 1. Drive bit line • 2. Select row (T sebagai switch) • Read: • 1. Select row • 2. Sense Amp (terhubung dengan bit line): sense & drives sesuai dengan value (threshold) • 3. Write: restore the value (high or low) • Refresh • Just do a dummy read to every cell. Kapasitor menyimpan state 1 (charged) atau 0 (discharge) Perlu refresh! row select T C bit

10. Classical DRAM Organization (square) bit (data) lines • Row and Column Address together: • Select 1 bit a time r o w d e c o d e r Each intersection represents a 1-T DRAM Cell RAM Cell Array word (row) select Column Selector & I/O Circuits row address Column Address data

11. DRAM-based Memory Systems n address DRAM Controller DRAM 2^n x 1 chip n/2 (Row & Column Addresses) w Bus Drivers

12. Operasi DRAM • Row Address (~50ns) • Set Row address pada address lines & strobe RAS • Seluruh row dibaca & disimpan di column latches • Isi dari row memori cells akan di-refresh • Column Address (~10ns) • Set Column address pada address lines & strobe CAS • Access selected bit • READ: transfer from selected column latch to Dout • WRITE: Set selected column latch to Din • Rewrite/Refreshed (~30ns) • Write back entire row

13. DRAM: Kinerja • Timing • Access time = 60ns < cycle time = 90ns • Need to rewrite row • Model asinkron: operasi memori dilakukan oleh controller circuit  delayprosesor menunggu sampai cycle time selesai lalu melakukan request lagi. • Must Refresh Periodically • Perform complete memory cycle for each row • Approx. every 1ms • Handled in background by memory controller

14. Perkembangan Teknologi Memori DRAM • Teknologi memori: segi kecepatan akses berkembang sangat lambat • Gap yang semakin membesar dengan kecepatan prosesor (cycle sangat kecil => 1 nsec, akses memori orde puluhan nsec). • Perkembangan teknologi DRAM • Basis tetap sama: 1-transistor memori cell (menggunakan kapasitor) • Inovasi dilakukan dari cara melakukan akses • memotong waktu akses (mis. CAS tidak diperlukan) • burst mode: sekaligus mengambil data sebanyak mungkin (seluruh word) • perlu tambahan rangkaian: register, latch dll

15. RAS Row decoder 256x256 cell array Row address latch row 8 \ A15-A8/ A7-A0 sense/write amps R/W’ col Column address latch column decoder & latch 8 \ CAS Enhanced Performance DRAMs • Conventional Access • Row + Col • RAS CAS RAS CAS ... • Page Mode • Row + Series of columns • RAS CAS CAS CAS ... • Gives successive bits • Video RAM • Shift out entire row sequentially • At video rate Entire row buffered here

16. N cols Fast Page Mode Operation Column Address • Fast Page Mode (FPM) DRAM • N x M “SRAM” to save a row • After a row is read into the register • Only CAS is needed to access other M-bit blocks on that row • RAS’ remains asserted while CAS’ is toggled • EDO DRAM • More modern FPM DRAM DRAM Row Address N rows N x M “SRAM” M bits M-bit Output 1st M-bit Access 2nd M-bit 3rd M-bit 4th M-bit RAS’ CAS’ A Row Address Col Address Col Address Col Address Col Address

17. SDRAM & DDR SDRAM • SDRAM: Synchronous DRAM • Address & Data are buffered in registers • Burst Mode: • Read/Write of different data lengths CAS signals are provided internally • Standards: PC100, PC133 • DDR SDRAM: Double-Data-Rate SDRAM • Data is transferred on both edges of the clock • Cell array is organized in 2 banks allows interleaving of word’s access • Standards: PC2100, PC2300 • RDRAM: Rambus DRAM • High transfer rate using differential signaling • Data is transferred on both edges of the clock • Memory cells are organized in multiple banks • Standards: proprietary owned by Rambus Inc.

18. Read-Only Memory • ROM – Read Only Memory • ROMs are RAMs with data built-in when the chip is created. Usually stores BIOS info. Older uses included storage of bootstrap info • Write once, by manufacturer • PROM – ProgrammableROM • A ROM which can be programmed • Write once, by user • EPROM – Erasable PROM • A PROM which can be programmed, erased by exposure to UV radiation • EEPROM – Electrically, Erasable PROM • A PROM programmed & erased electrically • Flash • ~EEPROM • Write in blocks • Low power consumption  battery driven • Implementation: • Flash Cards • Flash Drives: • Better than disk (no movable parts  faster response)

19. MEMORY HIERARCHY

20. Memory Hierarchy (1/4) • Prosesor • menjalankan program • sangat cepat waktu eksekusi dalam orde nanoseconds sampai dengan picoseconds • perlu mengakses kode dan data program!Dimana program berada? • Disk • HUGE capacity (virtually limitless) • VERY slow: runs on order of milliseconds • So how do we account for this gap?  Menggunakan teknologi hierarki memori!

21. Memory Hierarchy (2/4) • Memory (DRAM) • Kapasitas jauh lebih besar dari registers, lebih kecil dari disk (tetap terbatas) • Access time ~50-100 nano-detik, jauh lebih cepat dari disk (mili-detik) • Mengandung subset data pada disk (basically portions of programs that are currently being run) • Fakta: memori dengan kapasitas besar (murah!) lambat, sedangkan memori dengan kapasitas kecil (mahal) cepat. • Solusi: menyediakan (ilusi) kapasitas besar dan akses cepat!

22. Processor Increasing Distance from Proc.,Decreasing cost / MB Levels in memory hierarchy Level 1 Level 2 Level 3 . . . Level n Size of memory at each level Memory Hierarchy (3/4) Higher Lower

23. Memory Hierarchy (4/4) • Pada tingkat yang lebih dekat dengan Prosesor, mempunyai karakteristik: • Lebih kecil, • Lebih cepat, • Menyimpan subset dari data (mis. menyimpan data yang sering digunakan), • Efisien dalam pemilihan mana data yang akan disimpan, karena tempat terbatas • Tingkat paling rendah (biasanya disk) menyimpan seluruh data

24. Memory Hierarchy Analogy: Library (1/2) • You’re writing a term paper (Processor) at a table in Doe • Doe Library is equivalent to disk • essentially limitless capacity • very slow to retrieve a book • Table is memory • smaller capacity: means you must return book when table fills up • easier and faster to find a book there once you’ve already retrieved it

25. Memory Hierarchy Analogy: Library (2/2) • Open books on table are cache • smaller capacity: can have very few open books fit on table; again, when table fills up, you must close a book • much, much faster to retrieve data • Illusion created: whole library open on the tabletop • Keep as many recently used books open on table as possible since likely to use again • Also keep as many books on table as possible, since faster than going to library

26. Probability of reference 0 2^n - 1 Address Space Why hierarchy works • The Principle of Locality: • Program access a relatively small portion of the address space at any instant of time.

27. Lower Level Memory Upper Level Memory To Processor Blk X From Processor Blk Y Memory Hierarchy: How Does it Work? • Temporal Locality (Locality in Time):  Keep most recently accessed data items closer to the processor • Spatial Locality (Locality in Space):  Move blocks consists of contiguous words to the upper levels

28. Processor Control Tertiary Storage (Tape) Secondary Storage (Disk) Second Level Cache (SRAM) Main Memory (DRAM) On-Chip Cache Datapath Registers Speed (ns): 1s 10s 100s 10,000,000s (10s ms) 10,000,000,000s (10s sec) Size (bytes): 100s Ks Ms Gs Ts Memory Structure in Modern Computer System • By taking advantage of the principle of locality: • Present the user with as much memory as is available in the cheapest technology. • Provide access at the speed offered by the fastest technology.

29. How is the hierarchy managed? • Registers ↔ Memory • by compiler (programmer?) • Cache ↔ Memory • by the hardware • Memory ↔ Disks • by the hardware and operating system (virtual memory) • by the programmer (files)