IKI10230 Pengantar Organisasi Komputer Kuliah no. 04: Assembly Language

1. IKI10230Pengantar Organisasi KomputerKuliah no. 04: Assembly Language Sumber:1. Paul Carter, PC Assembly Language2. Hamacher. Computer Organization, ed-53. Materi kuliah CS61C/2000 & CS152/1997, UCB4. Intel Architecture Software Developer’s Manual 3 Maret 2004 L. Yohanes Stefanus (yohanes@cs.ui.ac.id)Bobby Nazief (nazief@cs.ui.ac.id) bahan kuliah: http://www.cs.ui.ac.id/kuliah/POK/

2. Revisi Jadwal Kuliah

3. REVIEW

4. Review: Pengelompokkan Bit • Bit String: INTEL • 4 bit nibble • 8 bit byte • 16 bit word • 32 bit double-word • 64 bit quad-word • Alamat lokasi memori • umumnya dinyatakan dengan bilangan heksa desimal • contoh: • lokasi memori 90 pada memori dengan ruang memori sebesar 64K (65536 = 216) dinyatakan dengan alamat: 0x005A • jika ruang memori sebesar 232 (4G) 0x0000005A

5. Alamat (32 bit) 00000000 00000001 00000002 00000003 00000004 00000005 00000006 00000007 FFFFFFFF 0101 1010 0000 0000 0000 0000 0000 0000 0011 0100 0001 0010 0000 1111 0000 0000 Review: Penyimpanan data multi-byte (Little Endian) int i = 90; 90 = 0x5A = 0000 00000000 00000000 00000101 1010 i j int j = 987700; 987700 = 0x000F1234 = 0000 00000000 11110001 00100011 0100

6. Review: Two’s Complement Numbers 0000 ... 0000 0000 0000 0000two = 0ten0000 ... 0000 0000 0000 0001two = 1ten0000 ... 0000 0000 0000 0010two = 2ten. . .0111 ... 1111 1111 1111 1101two = 2,147,483,645ten0111 ... 1111 1111 1111 1110two = 2,147,483,646ten0111 ... 1111 1111 1111 1111two = 2,147,483,647ten1000 ... 0000 0000 0000 0000two = –2,147,483,648ten1000 ... 0000 0000 0000 0001two = –2,147,483,647ten1000 ... 0000 0000 0000 0010two = –2,147,483,646ten. . . 1111 ... 1111 1111 1111 1101two = –3ten1111 ... 1111 1111 1111 1110two = –2ten1111 ... 1111 1111 1111 1111two = –1ten • One zero, 1st bit is called sign bit • but one negative with no positive –2,147,483,648ten

7. Review: Sign extension • Convert 2’s complement number using n bits to more than n bits • Simply replicate the most significant bit (sign bit) of smaller to fill new bits • 2’s comp. positive number has infinite 0s • 2’s comp. negative number has infinite 1s • Bit representation hides leading bits; sign extension restores some of them • 16-bit -4ten to 32-bit: 1111 1111 1111 1100two 1111 1111 1111 1111 1111 1111 1111 1100two

8. ARSITEKTUR INTEL X86: DARI PANDANGAN PEMROGRAM

9. Store Load Register: most frequently accessed operand Registers are in the datapath of the processor; if operands are in memory, we must transfer them to the processor to operate on them, And then transfer back to memory when done Computer Processor Memory Devices Input Control Datapath Registers Output

10. (64G) Sumber Daya Komputasi: Register & Memori

11. Sumber Daya Komputasi: Set Instruksi Data Transfers memory-to-memory move register-to-register move memory-to-register move Arithmetic & Logic integer (binary + decimal) or FP Add, Subtract, Multiply, Divide shift left/right, rotate left/right not, and, or, set, clear Program Sequencing & Control unconditional, conditional Branch call, return trap, return Input/Output Transfers register-to-i/o device move Synchronization test & set (atomic r-m-w) String search, translate Graphics (MMX) parallel subword ops (4 16bit add)

12. ORGANISASI MEMORI

13. Flat Memory Model • With the flat memory model, memory appears to a program as a single,continuous address space, called a linear address space. • The linear address space is byteaddressable, with addresses running contiguously from 0 to 236 - 1. • An address for any byte inthe linear address space is called a linear address.

14. Segmented Memory Model • With the segmented memory model, memory appears to a program as a group of independentaddress spaces called segments. When using this model, code, data, and stacks are typicallycontained in separate segments. • To address a byte in a segment, a program must issue a logicaladdress, which consists of a segment selector and an offset. The segment selector identifies the segment to be accessed and the offsetidentifies a byte in the address space of the segment. • The programs running on an IA processorcan address up to 16,383 segments of different sizes and types, and each segment can be as largeas 236 bytes.

15. Real-Address Mode Memory Model • The real-address mode model uses the memory model for the Intel 8086 processor, the first IAprocessor (for backward compatibility). • The real-address mode uses a specificimplementation of segmented memory in which the linear address space for the program and theoperating system/executive consists of an array of segments of up to 64 Kbytes in size each. • Themaximum size of the linear address space in real-address mode is 220 bytes.

16. REGISTERS

17. x86 Registers Program Counter (PC)

18. General Purpose Registers • GP Registers have additional, specific functions: • EAX Accumulator for operands and results data. • EBX Pointer to data in the DS segment. • ECX Counter for string and loop operations. • EDX I/O pointer. • ESI Pointer to data in the segment pointed to by the DS register; source pointer for string operations. • EDI Pointer to data (or destination) in the segment pointed to by the ES register; destination pointer for string operations. • ESP Stack pointer (in the SS segment). • EBP Pointer to data on the stack (in the SS segment).

19. Status Register: EFLAGS

20. Status Flags • SF (bit 7) Sign flag • Set equal to the most-significant bit of the result, which isthe sign bit of a signed integer. (0 indicates a positive value and 1indicates a negative value.) • ZF (bit 6) Zero flag • Set if the result is zero; cleared otherwise. • CF (bit 0) Carry flag • Set if an arithmetic operation generates a carry or aborrow out of the most-significant bit of the result; cleared otherwise. • OF (bit 11) Overflow flag • Set if the integer result is too large a positive numberor too small a negative number (excluding the sign-bit) to fit in thedestination operand; cleared otherwise. • PF (bit 2) Parity flag • Set if the least-significant byte of the result contains aneven number of 1 bits; cleared otherwise. • AF (bit 4) Adjust flag • Set if an arithmetic operation generates a carry or aborrow out of bit 3 of the result; cleared otherwise. Used in BCD arithmetic.

21. System Flags • IF (bit 9) Interrupt enable flag • Controls the response of the processor tomaskable interrupt requests. Set to respond to maskable interrupts;cleared to inhibit maskable interrupts. • IOPL (bits 12, 13) I/O privilege level field • Indicates the I/O privilege level of the currentlyrunning program or task. The current privilege level (CPL) of thecurrently running program or task must be less than or equal to theI/O privilege level to access the I/O address space. This field can onlybe modified by the POPF and IRET instructions when operating at aCPL of 0. • NT (bit 14) Nested task flag • Controls the chaining of interrupted and calledtasks. Set when the current task is linked to the previously executedtask; cleared when the current task is not linked to another task. • VM (bit 17) Virtual-8086 mode flag • Set to enable virtual-8086 mode; clear toreturn to protected mode.

22. Segment Registers • Used to hold 16-bit segment selectors • CS code segment • where the instructions being executed are stored. • DS data segment • ES,FS,GS extra (data) segment with possible configuration: • one for the data structures of the current module, • another for the data exported from a higher-level module, • a third for a dynamically created datastructure, • a fourth for data shared with another program. • SS stack segment

23. Use of Segment Registers in Flat Memory Model • Thesegment registers are loaded with segment selectors that point to overlapping segments, each ofwhich begins at address 0 of the linear address space. • Typically, two overlappingsegments are defined: one for code (pointed to by CS) and another for data and stacks.

24. Use of Segment Registers in Segmented Memory Model • Each segment register is ordinarily loaded with adifferent segment selector so that each segment register points to a different segment (up to 6 segments) within thelinear address space.

25. Data Storage

26. Storage of Fundamental Data Type

27. Storage of Numeric Data Type

28. PROCESSOR OPERATION MODE

29. 3 Modes of Operation • Protected mode • the native state of the processor • all instructions and architecturalfeatures are available, providing the highest performance and capability • recommended mode for all new applications and operating systems • the processor can use any of the memorymodels • ability to directly execute “real-addressmode” 8086 software in a protected, multitasking environment: virtual-8086 mode • Real-address mode • provides the programming environment of the Intel 8086 processorwith a few extensions • the processor is placed in real-address mode following power-up or a reset • only supports the real-addressmode memory model • System management mode • provides an operatingsystem with a transparent mechanism for implementing platform-specificfunctions such as power management and system security • the processor enters SMM when the external SMM interrupt pin (SMI#) is activated or an SMI is received from theadvanced programmable interrupt controller (APIC) • in SMM, the processor switches to aseparate address space while saving the entire context of the currently running program ortask

30. Protected Mode • a (segment) selectorvalue is an index into a descriptor table. • the segments are notat fixed positions in physical memory. In fact, they do not have to be inmemory at all! • Protected mode uses a technique called virtual memory. The basic ideaof a virtual memory system is to only keep the data and code in memory thatprograms are currently using. • 16-bit: • offsets are still 16-bit quantities. As a consequence of this, segment sizes are still limited toat most 64K. • 32-bit: • offsets are expanded to be 32-bits. This allows an oset to range upto 4 billion. Thus, segments can have sizes up to 4 gigabytes. • segments can be divided into smaller 4K-sized units called pages. • In Windows 3.x: • standard mode referred to 286 16-bit protected mode • enhanced mode referred to 32-bit mode. • Windows 9X, Windows NT/2000/XP,OS/2 and Linux all run in paged 32-bit protected mode.

31. Real Mode • In real mode, memory is limited to only 1M (220) bytes.Validaddress range from 0x00000 to 0xFFFFF. • 20-bit address is constructed using 2 16-bit values: • The first 16-bit value is called the selector, stored in segment register. • The second 16-bit value is calledthe offset. • The physical address referenced by a 32-bit selector:offset pair iscomputed by the formula: 16*selector + offset • multiplying by 16 in hex is easy, just add a 0 to the right of the number • for example, the physical addresses referenced by 047C:0048 is given by:047C0+0048 = 04808

32. Contoh program dalam real-mode • hello_m.asm: • segment .text • ..start: • movax,DATA • movds,ax • movdx,hello • mov ah,9 • int 0x21 • .... • segment DATA • hello:db'hello, world', 13, 10, '$‘ • debug hello_m.exe: AX=0B3D BX=FFFF CX=FE5A DX=0000 SP=010A BP=0000 SI=0000 DI=0000 DS=0B3C ES=0B2B SS=0B3D CS=0B3B IP=000D NV UP EI PL NZ NA PO NC 0B3B:000D BA0B00 MOV DX,000B -d ds:b 0B3C:0000 68 65 6C 6C 6F hello 0B3C:0010 2C 20 77 6F 72 6C 64 0D-0A 24 00 00 00 00 00 00 , world..$......

33. Intel x86 Assembly Program

34. NASM Assembly-Program Format [label:] instruction operands; comment • label: optional • represents the address of memory location storing the instruction • to be used as reference for: • data access • jump-address • instruction: • data transfer • arithmetic & logic • program sequencing & control • i/o • ... • operands: • register • memory • immediate • implied • comment • no comment

35. LABEL

36. Review: The Program is ... • lokasiinstruksi 0000 0846 Add 8,4,6 ; 8  [4] + [6] ; [8] = 61 + 17 = 78 0002 1686 Sub 6,8,6 ; 6  [8] – [6] ; [6] = 78 – 17 = 61 can be represented by labels

37. Label • Label: • Valid characters in labels are: • letters, numbers, _, $, #, @, ~, ., and ? • The only characters which may be used as the firstcharacter of an identifier are: • letters, . (period), _, ? • A label beginning with a single period is treated as a local label, which means that it is associated with the previous non-local label. So, for example: label1 ; some code .loop ; some more code jne .loop ret label2 ; some code .loop ; some more code jne .loop ret

38. Contoh: label dalam tugas0a.asm* • segment .data • data1db 11h • data2dw 2222h • data3dd 33333333h • datatmptimes 9 db 0ffh • segment .bss • stacks resd 1 • segment .text • global _asm_main • _asm_main: • mov eax,10 ; decimal number, value = 10 • mov edx,eax ; register-to-register transfer • mov esi,data1 ; esi points to data1 • mov al,[esi] ; indirect memory access, load 1 byte • mov bx,[esi] ; indirect memory access, load 1 word • mov ecx,[esi] ; indirect memory access, load 1 double-word • mov edi,[data3] ; direct memory operand

39. INSTRUCTIONS

40. 8  [4] + [6] Review: Bahasa Mesin  Bahasa Rakitan • Bahasa Mesin  kumpulan bit yang merepresentasikan Operasi & Operand • Bahasa Rakitan  representasi dari Bahasa Mesin dalam bahasa (kumpulan huruf & angka) yang lebih mudah dimengerti oleh manusia 0846:Add (8),(4),(6) Bahasa Rakitan Bahasa Mesin Register Transfer Notation mnemonic

41. Register Transfer Notation • Notasi yang menggambarkan proses pertukaran data yang terjadi pada eksekusi instruksi: • arah: dari sumber ke tujuan • operasi: ‘+’, ‘-’, … • Sumber/Tujuan Data: • Register • Memori • I/O Device • Nilai/content dari sumber data dinyatakan dengan • [sumber-data] • Contoh: • Pertukaran data: Move R1,LOC R1  [LOC] ; isi lokasi memori ‘Loc’ di- ; copy-kan ke register R1 • Operasi: Add R3,R1,R2 R3  [R1] + [R2] ; isi register R1 dijumlahkan ; dengan isi register R2, ; hasilnya disimpan di ; register R3

42. Review: Jumlah Operand  Kelas Set Instruksi • 3-address instruction Add C,A,B ; C [A] + [B] Operation Destination,Source1,Source2 atau Operation Source1,Source2,Destination • 2-address instruction Add A,B ; A  [A] + [B] Operation Destination,Source Format Instruksi Intel x86 • 1-address instruction Load B ; acc B Add A ; acc [acc] + [A] • 0-address instruction Push B ; tos  B Push A ; tos  A; [next] = B Add ; tos [tos] + [next]

43. Prefix Opcode Mod R/M SIB Displacement Immediate Instruction Format • Ukuran instruksi [n] bervariasi: 1  n  16 byte 0, 1, 2, 3, 4 1, 2 0,1 0,1 0, 1, 2, 3, 4 0, 1, 2, 3, 4 • Prefix: (Lock, Repeat), Overrides: Segment, Operand Size, Address Size • ModR/M: Addressing Mode • SIB: Scale, Index, Base • Displacement: Displacement’s Value • Immediate: Immediate’s Value • Konvensi: OPcode dst,src; dst  [dst] OP [src] • Contoh: MOV EAX,EBX ; register MOV EAX,[DATA] ; displacement MOV EAX,0x10 ; immediate REP MOV EDX,EAX ; prefix: REP MOV EAX,[EBP+4*ESI+Offset] ; base+index*scale+displacement ...

44. OPERANDS

45. EBX 100 0xb8 0x00000010 Operand Addressing • Register • refers to the data (content) of a register mov eax,ebx 89 d8 • Immediate • refers to a fixed value that is hard-coded into the instruction itself mov eax,0x10 b8 10 00 00 00 • Memory • refers to the data (content) of a memory location mov eax,[data]; eax  [data] (direct memory access) a1 d092 00 00; data is located at 0x000092d0 mov eax,[ebx]; eax  [[ebx]] (indirect memory access) 8b 03 ; data location = [ebx] EAX 100 EAX 0x00000010

46. DATA = 0x000092D0 MOV EAX,[DATA] 0x0000FFFF … (Direct) Memory Operand DATA DD 0x0000FFFF ... MOV EAX,[DATA] ; EAX  [DATA] MOV EAX,[0x000090D0] ; EAX  [0x000090D0] EAX 0x0000FFFF

47. (Indirect) Memory Operand DATA DD 0x0000FFFF ... MOV EBX,DATA ; EBX  DATA=0x000092D0 MOV EAX,[EBX] ; EAX  [[EBX]] MOV EBX,DATA 0x00009200 0x000092D0 MOV EAX,[EBX] EBX 0x000092D0 0x0000FFFF EAX 0x0000FFFF

48. Register Operands • Source and destination operands can be any of: • 32-bit GP registers: EAX, EBX, ECX, EDX, ESI, EDI, ESP, EBP • 16-bit GP registers: AX, BX, CX, DX, SI, DI, SP, BP • 8-bit GP registers: AH, BH, CH, DH, AL, BL, CL, DL • segment registers: CS, DS, SS, ES, FS, GS • EFLAGS register • system registers: GDTR (global descriptor table), IDTR (interrupt descriptor table register) • Some instructions (DIV & MUL) use quadword operands contained in a pair of 32-bit registers. • EDX:EAX  EDX: high-order dword, EAX: low-order dword • Contoh: mul ebx ; edx:eax [eax] * [ebx]

49. Contoh: register-operand dalam tugas0a.asm* • segment .data • data1db 11h • data2dw 2222h • data3dd 33333333h • datatmptimes 9 db 0ffh • segment .bss • stacks resd 1 • segment .text • global _asm_main • _asm_main: • mov eax,10 ; decimal number, value = 10 • mov edx,eax ; register-to-register transfer • mov esi,data1 ; esi points to data1 • mov al,[esi] ; indirect memory access, load 1 byte • mov bx,[esi] ; indirect memory access, load 1 word • mov ecx,[esi] ; indirect memory access, load 1 double-word • mov edi,[data3] ; direct memory operand

50. Immediate Operands • The maximum value allowed for an immediate operand varies among instructions, but can never be greater than the maximum value of an unsigned doubleword integer (232). • Numeric • mov eax,100; decimal • add eax,0a2h; hex • and eax,0xa2; hex again • imul eax,ebx,242q; octal • push 01010011b; binary • Character • mov eax,'abcd' • All arithmetic instructions (except DIV & IDIV instructions) allow the source operand to be an immediate value.