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ALU

ALU. ALU: Tasks performed in the control states. ALU: Control Signals. Signals that control the functionality of the ALU: ALUF[2:0] add (active during states: Decode, AluI, Adr.Comp., B.Taken,SavePC, JR, JALR). test (active during states: TestI).

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ALU

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  1. ALU

  2. ALU: Tasks performed in the control states

  3. ALU: Control Signals • Signals that control the functionality of the ALU: • ALUF[2:0] • add (active during states: Decode, AluI, Adr.Comp., B.Taken,SavePC, JR, JALR). • test (active during states: TestI). ALUF[2:0] – arithmetic / logical ALU operations 011 add 010 sub 110 and 101 or 100 xor ALUF[2:0] – test conditions 001 gt 010 eq 011 ge 100 lt 101 ne 110 le IR[2:0] = func[2:0] IR[28:26] = opcode[2:0]

  4. OR(32) XOR(32) OR MUX(32) AND(32) INV MUX(32) Comparator(32) MUX(32) Next slide MUX(3) ALU: Implementation MUX(32)

  5. ZERO(32) Comparator INV AND AND AND INV AND OR ALU: Implementation (cont’) OR

  6. “Register B” • The instructions in which register B is loaded: • add • sub • and • or • xor • store Register B is not involved in computations during instructions in which it need not be loaded. Therefore, functionality is correct. Loading register B always (during Decode state), shortens the length of the path in the Control State Machine when executing instructions that need register B loaded.

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