EEPROM Workshop

1. EEPROM Workshop October 12, 2005 Ed Patnaude Sr. Applications Engineer Maxwell Technologies

2. EEPROM Topics • EEPROM Technology • Reliability • Maxwell’s Self Defined Screening Flow • Flight Heritage • Known Failures • Data Retention/Endurance/Radiation Effects • Design Considerations • Summary

3. EEPROM Technology • Maxwell’s EEPROM product family incorporates the Hitachi 58C1001 one megabit EEPROM die. • The EEPROM is an 0.8 micron CMOS process using Metal-Nitrate-Oxide-Semiconductor (MNOS) transistors. • The non-volatility of the device is achieved with a widely used technology – The Floating Gate.

4. Reliability • Life Test – Maxwell has life tested over 750 devices, since 1996, and have had 0 failures. • Data Retention Screening - Since February 2003 Maxwell has tested over 8000 device and has had only four failures. No devices have been returned to Maxwell with data retention issues that have received data retention testing. • Endurance Testing – Since 1996 Maxwell has endurance tested over 100 EEPROM devices to greater than 10,000 Erase/Write cycles with 0 failures. • Radiation Testing – Every EEPROM die lot is TID tested to ensure the devices meet specification. SEL testing shows no latch-up at 125°C to > 85 Mev/mg/cm2.

5. Reliability Test –Spring 2005 • Ten 1 Megabit EEPROM were subjected to combined Endurance, Data Retention and TID testing. • The test was divided into four test levels. At each level the parts received: • 5000 erase/write endurance cycles with checkerboard pattern followed by an inverse checkerboard pattern • Two 72 hour data retention test ( one with a checkerboard pattern and one with the inverse). • 10 krads(Si) irradiation using Co60 Source. • At 40krads(Si), 20,000 Endurance Cycles and eight 72 hour Data Retention test the 10 devices remained within specification. • The parts were then subjected to a 1000 hour life test. Final electrical testing shows the EEPROMs still within specification.

6. EEPROM Measured Design Margin Pre radiation Test Data (Specification -Mean)/Standard Deviation (σ) is a measure of the design margin – “How much margin exists between measured performance and specified performance?” EEPROM has very conservative specifications!

7. The Maxwell Guarantee • Maxwell guarantees that the EEPROM will retain programmed data, powered or un-powered, for greater than ten year at +55C and below. • A 2000 hour data retention test, using 90 parts, had no failures. This indicates the EEPROMs are capable of retaining data for over 300 years. • Maxwell guarantees that the EEPROM will endure 10,000 Erase/Write cycles, without degradation, when programmed in the page mode. • Devices are routinely endurance tested to > 20,000 cycles. To-date there have been no endurance failures, even to 40,000 cycles. • Maxwell guarantees that the EEPROM can be irradiated for the life of the application, at the die level, and remain within specification. • Radiation testing to >43 krads(Si)

8. Maxwell’s Self Defined Screening Flow

9. Flight Heritage RAD6000 & RAD750

10. Identified EEPROM Failures Source - Independent Team Review • Only one reported flight failure, all other failures found during board test. • There was very little details made available. • All failures could not be verified.

11. EEPROMs returned to Maxwell

12. Analysis of Failures • All identified failures fall into to three categories: 1) programming failures, 2) data retention failures, 3) temperature related failures. • Per Maxwell Technologies Product Advisory #1008539 – a programming error which allowed devices with un-programmable bytes to escape screening has been corrected. • Since October 2004 all Maxwell EEPROMs receive a 72 Hour data retention screen. • It is unknown what screening the devices that had temperature related failure received. All Class I and Flight Class Devices, from Maxwell receive –55, +25 and +125C testing.

13. Data Retention • Data retention is a measure of the period of time a non-volatile memory can retain programmed data. • Under normal operating conditions Maxwell’s EEPROM will retain data for greater than ten years. • Maxwell Technologies EEPROM utilize a floating gate memory cell, in which the gate is charged and discharged to store logic 1’s and 0’s. Over time the charge will leak off through conductive paths made up of impurities in the silicon. • Increase in temperature accelerates the leakage. As the cell approaches failure, access time begins to slow.

14. Access Time Reduction A Normally Operating Data Bit Prior to Cell Leakage Known Bad Part

15. Access Time Reduction A Weak Bit Just Beginning to Fail 7 Hrs at 150C and 15 Hrs Room Temp Known Bad Part

16. Access Time Reduction A Failed Data Bit 7 hours 150C Bake and 18 Hours at Room Temp Known Bad Part

17. Maxwell’s Data Retention Screen • The data retention screening test is performed after the devices have completed all electrical and mechanical screening. • Devices are programmed with a checkerboard pattern. The pattern is verified and software protection is enabled. • The devices are placed in a 150C oven, un-powered, for 72 hours. • Upon completion of the 72 hour bake, the patterns are verified and those devices failing pattern verification are removed form the lot. • Prior to shipping devices are programmed with all 0’s and software protection is disabled.

18. Data Retention • Test sequence: • Programmed with 55AA pattern, • Memory protection enabled, then • Placed unbiased into oven @ 150 ºC for 72 hours. • Post burn in perform pattern verification test • Test simulates time with Temperature using the Arrhenius equation • AF = exp {(AE / k)[1/t1-1/t2]} AF = acceleration factor, AE = activation energy, k = Boltzmann's constant (8.6E-5 eV/k ) • AE=1.1eV (from Mfg) T1 = 55 ºC , T2 = 150 ºC • AF =6206 50 years • Production Screening: • 8741 devices tested only 4 failures • All failed devices removed from production lots • Post Radiation – No Failures!

19. Data Retention with TID [1] FIT rate is defined as the expected number of component failures per 109 (ten to the ninth power, or 1,000,000,000) hours. The FIT rate can be converted to the MTBF (Mean Time Between Failures) in hours as MTBF = 109/FIT. Data Retention not effected by radiation - No data retention failures after irradiation!

20. EEPROM Endurance • Each memory cell, in the EEPROM, can be programmed up to 10,000 times when using the page mode operation. • Maxwell has performed endurance testing in which the EEPROMs were written in excess of 40,000 times, after irradiation, with no failures.

21. Endurance Test • Specification - 10,000 erase/write cycles • Tested to 2x Specification + 40 krad(Si) • No failures! Conclusion: TID does not reduce endurance!

22. Radiation Performance of the EEPROM Maxwell Technologies' patented RAD-PAK® packaging technology incorporates radiation shielding in the microcircuit package. • Total Dose Hardness > 100 krads(Si) • SEL > 120 MeV/mg/cm2 • SEU > 90 MeVmg/cm2 ( Read Mode) • SEU > 18 MeV/mg/cm2 ( Write Mode)

23. Design Considerations • Software Protection • Proper implementation of the RESET Pin • Byte vs. Page Programming • Proper Power Cycling • Error Detection and Correction • Power Supervisory Circuitry

24. Software Data Protection • Software Data Protection locks the memory preventing unintentional erase/writes from occurring. • Maxwells’ EEPROMs implement Software Data Protection via the JEDEC standard algorithm. • Software Data Protection will only protect the memory contents when the supply voltage is within the normal operating range.

25. Hardware Protection Maxwells’ EEPROM’s have a RESET or Write Protect input. When set active (LOW), all erase/writes operations are blocked.

26. Proper Power Cycling • Allow Vcc to reach proper operating level before initiating any Reads or Writes to the EEPROM. • Enable the EEPROM Hardware Write Protection, or Reset, prior to power down. • Do not remove power while a write cycle is in process.

27. Byte vs. Page Programming • The EEPROM can program from 1 to 128 bytes in one write cycle. • The bytes that are written, must all be located in one page. • There are 1024 pages in a 1 Megabit EEPROM • Each page of 128 bytes is further sub-divided into 16 sub-pages, each containing 8 bytes. • The 8 byte sub-page is the smallest unit that can be written to. • When a single byte is written the other seven bytes contained in the sub-page are copied and re-written. • When operationing the Byte programming mode, endurance is reduced to 1250 write cycles due to the minimum programming unit.

28. Error Detection and Correction • When the architecture allows, the simple use of Parity Bits can detect single bit errors. • A Checksum is useful when determining when data corruption has occurred in the device. • Error Correction Codes can restore corrupted memory locations. Two examples are Hamming Code and Reed-Solomon.

29. Power Supervisory Circuitry • Monitor supply voltages and provide a RESET signal when the voltage drops below a pre-described level.

30. Conclusion • Die are packaged in Maxwell’s RAD-PAK™ package • 100% wafer lot testing for TID • Each customer requirement is analyzed and assigned a die lot based on actual data to meet requirement with margin. • 100% production screening to eliminate any data retention failures • TID data retention tests showed no influence of TID on data retention • Multiple endurance tests above specification (10,000 write cycles) and with TID showed no failures, • Part exceeds specification even after 40 krad(Si) irradiation & 20,000 write cycles • Tested for TID, Data retention and Endurance • EEPROM is conservatively specified – high design margins • No data retention degradation due to TID • No endurance degradation due to TID • Performance within specification at 43 krads(Si)