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Lecture 23: Multistage Amps-Cascades and Cascodes

Lecture 23: Multistage Amps-Cascades and Cascodes. Prof. Niknejad. Lecture Outline. Example 1: Cascodes Amp Design Example 2: Two Stage CS Amp. CG Cascade: DC Biasing. Two stages can have different supply currents. Extreme case: I BIAS 2 = 0 A. CG Cascade: Sharing a Supply.

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Lecture 23: Multistage Amps-Cascades and Cascodes

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  1. Lecture 23:Multistage Amps-Cascades and Cascodes Prof. Niknejad

  2. Lecture Outline • Example 1: Cascodes Amp Design • Example 2: Two Stage CS Amp University of California, Berkeley

  3. CG Cascade: DC Biasing Two stages can have different supply currents Extreme case: IBIAS2 = 0 A University of California, Berkeley

  4. CG Cascade: Sharing a Supply First stage has no currentsupply of its own  its outputresistance is modified University of California, Berkeley

  5. The Cascode Configuration Common source / common gatecascade is one version of a cascode (all have shared supplies) DC bias: Two-port model: first stage has no current supply of its own University of California, Berkeley

  6. Cascode Two-Port Model Output resistance of first stage = Why is the cascode such an important configuration? University of California, Berkeley

  7. Miller Capacitance of Input Stage Find the Miller capacitance for Cgd1 Input resistance to common-gatesecond stage is low  gain acrossCgd1 is small. University of California, Berkeley

  8. Two-Port Model with Capacitors Miller capacitance: University of California, Berkeley

  9. Generating Multiple DC Voltages Stack-up diode-connected MOSFETs or BJTs and run a reference current through them  pick off voltages from gates or bases as references University of California, Berkeley

  10. Multistage Amplifier Design Examples Start with basic two-stage transconductance amplifier: Why do this combination? University of California, Berkeley

  11. Current Supply Design Output resistance goal requires large roc use cascode current source University of California, Berkeley

  12. Totem Pole Voltage Supply DC voltages must be set for the cascode current supply transistors M3 and M4, as well as the gate of M2. Why include M2B? University of California, Berkeley

  13. Complete Amplifier Schematic Goals:gm1 = 1 mS,Rout =10 M University of California, Berkeley

  14. Device Sizes M1: select (W/L)1 = 200/2 to meet specified gm1 = 1 mS  find VBIAS = 1.2 V Cascode current supply devices: select VSG = 1.5 V (W/L)4= (W/L)4B= (W/L)3= (W/L)3B = 64/2 M2: select (W/L)2 = 50/2 to meet specified Rout =10 M find VGS2 = 1.4 V Match M2 with diode-connected device M2B. Assuming perfect matching and zero input voltage,what is VOUT? University of California, Berkeley

  15. Output (Voltage) Swing Maximum VOUT Minimum VOUT University of California, Berkeley

  16. Two-Port Model Find output resistance Rout n = (1/20) V-1, n = (1/50) V-1 at L = 2 m  ron = (100 A / 20 V-1)-1 = 200 k, rop = 500 k University of California, Berkeley

  17. Voltage Transfer Curve Open-circuit voltage gain: Av = vout / vin = - gm1Rout University of California, Berkeley

  18. Two-Stage Amplifier Topology Direct DC connection: use NMOS then PMOS University of California, Berkeley

  19. Current Supply Design Assume that the reference is a “sink” set by a resistor Must mirror the reference current and generate a sink for iSUP 2 University of California, Berkeley

  20. Use Basic Current Supplies University of California, Berkeley

  21. Complete Amplifier Topology What’s missing? The device dimensions and the bias voltage and reference resistor University of California, Berkeley

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