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Thermodynamics in Chip Processing II

Thermodynamics in Chip Processing II. Terry A. Ring. CVD. Materials Deposited. Dielectrics SiO2, BSG Metals W, Cu, Al Semiconductors Poly silicon (doped) Barrier Layers Nitrides (TaN, TiN), Silicides (WSi 2 , TaSi 2 , CoSi, MoSi 2 ). Deposition Methods. Growth of an oxidation layer

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Thermodynamics in Chip Processing II

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  1. Thermodynamics in Chip Processing II Terry A. Ring

  2. CVD

  3. Materials Deposited • Dielectrics • SiO2, BSG • Metals • W, Cu, Al • Semiconductors • Poly silicon (doped) • Barrier Layers • Nitrides (TaN, TiN), Silicides (WSi2, TaSi2, CoSi, MoSi2)

  4. Deposition Methods • Growth of an oxidation layer • Spin on Layer • Chemical Vapor Deposition (CVD) • Heat = decomposition T of gasses • Plasma enhanced CVD (lower T process) • Physical Deposition • Vapor Deposition • Sputtering

  5. Critical Issues • Adherence of the layer • Chemical Compatibility • Electro Migration • Inter diffusion during subsequent processing • Strong function of Processing • Even Deposition at all wafer locations

  6. CVD of Si3N4 - Implantation mask • 3 SiH2Cl2 + 4 NH3Si3N4 + 6 HCl + 6 H2 • 780C, vacuum • Carrier gas with NH3 / SiH2Cl2 >>1 • Stack of wafer into furnace • Higher temperature at exit to compensate for gas conversion losses • Add gases • Stop after layer is thick enough

  7. CVD of Poly Si – Gate conductor • SiH4Si + 2 H2 • 620C, vacuum • N2 Carrier gas with SiH4 and dopant precursor • Stack of wafer into furnace • Higher temperature at exit to compensate for gas conversion losses • Add gases • Stop after layer is thick enough

  8. CVD of SiO2 – Dielectric • Si0C2H5 +O2SiO2 + 2 H2 • 400C, vacuum • He carrier gas with vaporized(or atomized) Si0C2H5and O2 and B(CH3)3 and/or P(CH3)3 dopants for BSG and BPSG • Stack of wafer into furnace • Higher temperature at exit to compensate for gas conversion losses • Add gases • Stop after layer is thick enough

  9. CVD of W – Metal plugs • 3H2+WF6 W + 6HF • T>800C, vacuum • He carrier gas with WF6 • Side Reactions at lower temperatures • Oxide etching reactions • 2H2+2WF6+3SiO2 3SiF4 + 2WO2 + 2H2O • SiO2 + 4HF  2H2O +SiF4 • Stack of wafer into furnace • Higher temperature at exit to compensate for gas conversion losses • Add gases • Stop after layer is thick enough

  10. Chemical Equilibrium

  11. CVD Reactor • Wafers in Carriage (Quartz) • Gasses enter • Pumped out via vacuum system • Plug Flow Reactor Vacuum

  12. CVD Reactor • Macroscopic Analysis • Plug flow reactor • Microscopic Analysis • Surface Reaction • Film Growth Rate

  13. Macroscopic Analysis • Plug Flow Reactor (PFR) • Like a Catalytic PFR Reactor • FAo= Reactant Molar Flow Rate • X = conversion • rA=Reaction rate = f(CA)=kCA • Ci=Concentration of Species, i. • Θi= Initial molar ratio for species i to reactant, A. • νi= stoichiometeric coefficient • ε = change in number of moles

  14. Combined Effects Contours = Concentration

  15. Reactor Length Effects SiH2Cl2(g) + 2 N2O(g) SiO2(s)+ 2 N2(g)+2 HCl(g) How to solve? Higher T at exit!

  16. Deposition Rate over the Radius CAs r Thiele Modulus Φ1=(2kRw/DABx)1/2

  17. Radial Effects This is bad!!!

  18. Combined Length and Radial Effects Wafer 10 Wafer 20

  19. CVD Reactor • External Convective Diffusion • Either reactants or products • Internal Diffusion in Wafer Stack • Either reactants or products • Adsorption • Surface Reaction • Desorption

  20. Microscopic Analysis -Reaction Steps • Adsorption • A(g)+SA*S • rAD=kAD (PACv-CA*S/KAD) • Surface Reaction-1 • A*S+SS*S + C*S • rS=kS(CvCA*S - Cv CC*S/KS) • Surface Reaction-2 • A*S+B*SS*S+C*S+P(g) • rS=kS(CA*SCB*S - Cv CC*SPP/KS) • Desorption: C*S<----> C(g) +S • rD=kD(CC*S-PCCv/KD) • Any can be rate determining! Others in Equilib. • Write in terms of gas pressures, total site conc.

  21. CMP

  22. What is CMP? • Polishing of Layer to Remove a Specific Material, e.g. Metal, dielectric • Planarization of IC Surface Topology

  23. Scratching Cases • Rolling Indenter • Line Scratches • Copper Only • Copper & ILD • Chatter Scratches • Uncovery of Pores

  24. CMP Tooling • Rotating Multi-head Wafer Carriage • Rotating Pad • Wafer Rests on Film of Slurry • Velocity= -(WtRcc)–[Rh(Wh –Wt)] • when Wh=Wt Velocity = const.

  25. Slurry • Aqueous Chemical Mixture • Material to be removed is soluble in liquid • Material to be removed reacts to form an oxide layer which is abraded by abrasive • Abrasive • 5-20% wgt of ~200±50nm particles • Narrow PSD, high purity(<100ppm) • Fumed particle = fractal aggregates of spherical primary particles (15-30nm)

  26. Pad Properties • Rodel Suba IV • Polyurethane • tough polymer • Hardness = 55 • Fiber Pile • Specific Gravity = 0.3 • Compressibility=16% • rms Roughness = 30μm • Conditioned

  27. Heuristic Understanding of CMP • Preston Equation(Preston, F., J. Soc. Glass Technol., 11,247,(1927). • Removal Rate = Kp*V*P • V = Velocity, P = pressure and Kp is the proportionality constant. Sun,S.C., Yeh, F.L. and Tien, H.Z., Mat. Res. Cos. Symp. Proc. 337,139(1994)

  28. CMP Pad Modeling • Pad Mechanical Model - Planar Pad • Warnock,J.,J. Electrochemical Soc.138(8)2398-402(1991). • Does not account for Pad Microstructure

  29. CMP Modeling • Numerical Model of Flow under Wafer • 3D-Runnels, S.R. and Eyman, L.M., J. Electrochemical Soc. 141,1698(1994). • 2-D-Sundararajan, S., Thakurta, D.G., Schwendeman, D.W., Muraraka, S.P. and Gill, W.N., J. Electrochemical Soc. 146(2),761-766(1999).

  30. Copper Dissolution • Solution Chemistry • Must Dissolve Surface Slowly without Pitting • Supersaturation Corrosion Immunity Johnson, H.E.and Leja, J., J. Electrochem. Soc. 112,638(1965).

  31. Oxidation of Metal Causes Stress • Stress, i = E i (P-B i – 1)/(1 - i) • P-Bi is the Pilling-Bedworth ratio for the oxide P-B 3.4 2.1

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