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Thermodynamics in Chip Processing

Thermodynamics in Chip Processing. Terry Ring. Silicon Wafers. Chip Feature Scaling. Moore’s Law. please see http://developer.intel.com/update/archive/issue2/focus.htm. What is a semiconductor?. Conductor Metal Insulator Ceramic (oxides) Semiconductor Diamond Silicon Germanium

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Thermodynamics in Chip Processing

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  1. Thermodynamics in Chip Processing Terry Ring

  2. Silicon Wafers

  3. Chip Feature Scaling

  4. Moore’s Law • please see http://developer.intel.com/update/archive/issue2/focus.htm

  5. What is a semiconductor? • Conductor • Metal • Insulator • Ceramic (oxides) • Semiconductor • Diamond • Silicon • Germanium • Gallium Arsenide • Host of others

  6. Intrinsic Silicon • Silicon has four valence electrons. When a group of Silicon atoms bond together to produce a pure lattice structure, the material is referred to as Intrinsic Silicon.

  7. Silicon Doping • This pure silicon configuration (intrinsic silicon) is a poor conductor because none of its electrons are available to serve as carriers of electric charge. • The fabrication of integrated circuits requires that the substrate (the wafer surface) be somewhat conductive. • This process is known as doping. Boron (B), Phosphorus (P), and Arsenic (As) are the most common dopant atoms used in the industry.

  8. Dopant Chemistry • By looking at the Periodic Table, we can determine the number of electrons that Boron and Phosphorus have in their outer orbit.

  9. P Si Si Si Si Si Si Si Si N-Type P

  10. Si Si Si Si Si Si Si Si P-Type B B

  11. Anatomy of a Memory Chip One Die or Chip

  12. Building Blocks of the DRAM memory cell

  13. READ

  14. WRITE

  15. Basic DRAM memory cell - 1T

  16. DRAM memory Array

  17. MOSFET-Gate, Source, Drain Metal-Oxide-Semiconductor-Field-Effect-Transistors • A MOSFET is composed of three main components; a gate, a source, and a drain. The gate is a physical structure built on the wafer surface to control the opening and closing of a source-to-drain channel. To create this structure, a metal and oxide layer are formed on a semiconductor surface (MOS). The source and drain regions are just highly doped, shallow pockets in the wafer surface next to the gate.

  18. The Transistor(continued) • Doing the dishes requires that we access a Source (or reservoir) of water. • Channel (or pipe) connects the reservoir to the sink. Don’t want a continuous flow of water to our drain (or sink). . . • Need a gate (or valve) to block the water flow.

  19. Next Step Deposit Metal

  20. Lithography Light Source • Light passes thru die mask • Light imaged on wafer • Stepper to new die location • Re-image Mask Reduction Lens Wafer with Photoresist

  21. MS&E vs ChE • How is a Materials Science and Engineering Education Different from Chemical Engineering Education? • Focus on Solids Processing • What Crystal Structure • Higher Purity Materials • Impurities Control Properties • Semiconductors • Grain Boundaries • Where atoms are in structure determines properties

  22. Where Thermodynamics Comes into Chip Processing • Evaporation Rate during Spin Coating • Evaporation Rate during Photoresist Drying • Metal Physical Deposition • Chemical Vapor Deposition • Feed of TEOS • Rxn of TEOS • Etching - SiF4 vapor pressure • CMP Solution Equilibria • Dissolution/Precipitation

  23. Lithography Light Source • Light passes thru die mask • Light imaged on wafer • Stepper to new die location • Re-image Mask Reduction Lens Wafer with Photoresist

  24. PhotoLythographyPhotoResist UV light=193 nm 80 nm Line

  25. Photoresist -Sales $1.2 billion/yr. in 2001 • Resins • phenol-formaldehyde, I-line • Solvents • Photosensitive compounds • Polymethylmethacrylate or poly acrylic acid • = 638 nm RED LIGHT • diazonaphthoquinone • Hg lamp, = 365 nm, I-line • o-nitrobenzyl esters – acid generators • Deep UV, = 248 nm, KrF laser • Cycloolefin-maleic anhydride copolymer • Poly hydroxystyrene • =193 nm gives lines 100 nm • = 157 nm F laser • Additives

  26. Photoresist • Spin Coat wafer • Dry solvent out of film • Expose to Light • Develop • Quench development • Dissolve resist (+) or developed resist (-)

  27. Spin Coating • Cylindrical Coordinates • Navier-Stokes • Continuity

  28. Newtonian Fluid-non-evaporating If hois a constant film is uniform For thin films, h  -1 t-1/2

  29. Evaporation Model - Heuristic Model • CN non-volatile, CV volatile • e = evaporation rate of volatile component • ei = kMA(Psolvent-I - 0) • q = flow rate

  30. Evaporation Rate • What is Psolvent-i in a mixture? • Other solvents and non-volatile components • fil = fiv equilibrium condition • fiv =yiP • fil = γixi Pisat • ln γi =GiE/(RT)

  31. Vapor Pressure of 2 solvent mix • P=Σ γixi Pisat = γ1x1 P1sat +γ2x2 P2sat • y1 =P1/P= γ1x1 P1sat /(γ1x1 P1sat +γ2x2 P2sat ) • Pisat obtained from Normal Boiling Point & Heat of vaporization (Claperon Equation) • γ

  32. See MathCad Example • Vapor Pressure of Solvent Mix.mcd • Binary Solvent Mixture • Ternary mixture of Solvent plus Non-volatile Resin

  33. Next StepDissolve Edge of Photoresist • So that no sticking of wafer to surfaces takes place • Wafers are stored in a rack on edge • So that no dust or debris attaches to wafers Wafer with Photoresist

  34. How would you set up this problem? • fil = fis equilibrium condition • fis = γsizi fsi • fil = γlixi fli • ln γli =GiE/(RT) same a previous example of solvent mix • γlixi fli = zi γsi fsi • γlixi = zi γsiΨi • Ψi = exp{(ΔHisl/R)[(1/Tm) - (1/T)]} • ΔHisl =Heat of fusion, Tm melting temperature • zi γsi=1 for ideal solid (misicible) • zi= mole fraction of mix in solid

  35. Break • Second lecture is next • What did we learn • Calculate the partial pressure • Used to calculate the evaporation rate of a component of a solvent mixture • Calculate the solubility of a solid in a solvent mixture

  36. Lecture 2 • Metal Deposition on the wafer • Wires to connect the transistors and capacitors • To each other • To outside world • 2 Mb memory chip has • > 1 km of wire • 8 layers of wiring on top

  37. Deposition Methods • Growth of an oxidation layer • Spin on Layer • Chemical Vapor Deposition (CVD) • Heat = decomposition T of gasses • Plasma enhanced CVD (lower T process) • Physical Deposition • Vapor Deposition • Sputtering

  38. Physical Vapor Deposition • Evaporation from Crystal (metal) • Deposition on Wall

  39. Physical Deposition Reactor • Wafers in Carriage (Quartz) • Carrier Gasses enter • Pumped out via vacuum system • Furnace • Metal evaporated • Sublimation • No liquid phase Furnace Vacuum Chamber at lower Temp s v l P V

  40. Deposition Rate • Ratei = Km A {Pi(TF) - Pi(TC)} • What is the sublimation partial pressure of metal as a function of temperature? • fiv = fis equilibrium condition • fis = γsizi fsi= γsizi Pisat exp[VMi(P - Pisat)/(RT)] • Poynting Factor • fiv =yiP

  41. Metal Saturation Pressure • Sublimation Vapor Pressure • Claperon Equation • ΔHS is the heat of sublimation • ΔHS = ΔHF + ΔHV • solid to liquid then liquid to vapor

  42. MathCad File • Sublimation Vapor Pressure of Alloy.mcd

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