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Condition Monitoring for Power Electronics Reliability (COMPERE)

Condition Monitoring for Power Electronics Reliability (COMPERE). Shaoyong Yang Angus Bryant Phil Mawby Dec 2008. Progress since Last ESR. Work plan – where we are and tasks Reliability of solder joints + power cycling tests Back-to-back test rig Review paper

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Condition Monitoring for Power Electronics Reliability (COMPERE)

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  1. Condition Monitoring for Power Electronics Reliability (COMPERE) Shaoyong Yang Angus Bryant Phil Mawby Dec 2008

  2. Progress since Last ESR • Work plan – where we are and tasks • Reliability of solder joints + power cycling tests • Back-to-back test rig • Review paper Discussion and Conclusion 5. Conference papers EPE and ECCE 2

  3. 1. Original Work plan • Power Converter Modelling • Modified work plan 3

  4. Modified work plan 4

  5. LUT1- Electro-thermal modelling • IGBT model used in full converter modelling • Simulation of every switching event is too time-consuming. • Look-up table of losses is used instead: • Generated from device models in MATLAB/Simulink. • Gives losses as a function of load current and temperature. • Simple converter/heatsink model then simulates device temperature. • Rapid and accurate estimation of device temperature for whole load cycle. Converter simulation Simulation controller Look-uptable EXTERNAL CONDITIONS LOSS DATA Device temp. Power diss. Heatsink model Compact models System modelling Device modelling 5

  6. LUT 1: Power Device Model Compact models for IGBTs and diodes: Ambipolar diffusion equation describes carrier distribution. Proven over wide range conditions: –50°C ~ +150°C, Voltage & current. Have to be tailored/parameterised: On-state Switching behaviour (the right figure); 6

  7. Parameterisation tests SKM75GB123D 1200 V, 75 A 7

  8. Matching for inductive switching Inductive switching shown here. IGBT turn-on (left), IGBT turn-off (right). • Instantaneous power dissipations shown to validate switching energies. 8

  9. Matching for on-state characteristics 9

  10. Look-up table 1 IGBT power losses (W) for whole switching cycle plotted as a function of load current (A), duty ratio and temperature (°C). 10

  11. Progress for parameterisation 1 Switching and on-state tests have been carried out -50-125 o C. 2 Full parameterisation of the selected Semikron module is being done. 11

  12. LUT2- Electro-mechanic modelling 12

  13. LUT 2: packaging damage 13

  14. 2.Reliability of solder joints +power cycling tests Packaging reliability: solder + bonding Formidable tasks for solders still: Stress and strain levels, usually cyclic; Component contact and geometries are complex; Contact surface may wear out; Plastic and elastic behaviours- also complex  Creep, fatigue and fracture are main mechanisms. 14

  15. CREEP Creep: the tendency to slowly move or deform permanently when stress and temp are sufficiently high, e.g. dislocation migration, annealing, viscous grain boundary sliding, voids and mechanical relaxation. (1) 15

  16. FATIGUE After propagating for some time, unnoticed cracks occur without warning. Some materials, like steel, display an endurance limit, below which failure does not occur irrespective of the number of cycles. But Al and polymers show no such endurance limits. Related with temp (Tm, ΔT), cyclic freq (Δt), and mechanical vibrations. 16

  17. Quantifying FATIGUE (1) For chip on the substrate The stress is (2) E: modulus of elasticity, an object’s tendency to be deformed elastically, the slope of its stress/strain in the elastic deformation region, pa. v: Poisson ratio, CTE of chip and substrate, K-1 If the chip will contract more than the substrate when cooling. Surprisingly, the stress is independent of the CTE of the solder. 17

  18. Quantifying FATIGUE (2) Stress-strain hysteresis vary with time: the wide loops when plastic effects dominates; narrow loops when elastic effects dominates. 18

  19. Quantifying FATIGUE (3) Fatigue dependent on temp and freq. For leadless joints as used in power modules The mean cyclic life of leadless joints is given by: (3) For 63Sn-37Pb solder, =0.65 and c=-0.442 – 6 × 10-4Tm+1.74 × 10-2ln(1+360/tD)  Nf = f(Tm, ΔT, Δt) 19

  20. Power cycling tests Fatigue quantification needs: Solder composition. Package physical parameters Temperature measurements Then power cycling tests can be carried out: Predict lifetime, which confirms the assumption of ΔRth variation with degradation. To study solder fatigue mechanism. To study bonding degradation. Power cycling tests to be carried out on the b2b rig. 20 14

  21. 3.B2B test rig • Designed to work at Vdc=450 V 21

  22. B2B test rig 22

  23. B2B test rig 23

  24. Gate circuit • Space vector width modulation+ PID control. • DC 300 V, 10 A tested. Gate outputs Gate drivers Signal + power inputs buffer 24

  25. 4. Review paper • 1 Title – Peter’s suggestion Condition monitoring for reliability in power electronics converters – a review. • 2 Discussion and conclusions It was not specific and deep enough. Angus is going to rewrite it and hopefully will finalise by Christmas. 25

  26. 5. Conferences • EPE 09: Dawei submitted a paper. • ECCE 09: Shaoyong will submit a paper abstract by Jan 15th 2009 on the questionnaire survey. Full paper deadline: July 20th 2009 26

  27. Thank you for your attention! 27

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