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Floating-Gate Circuits, Systems, and Adaptation

Explore the world of floating-gate circuits and their applications, including analog/digital memory, adaptive circuits, and neural interfacing. Learn about the latest research and developments in this field.

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Floating-Gate Circuits, Systems, and Adaptation

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  1. Floating-Gate Circuits, Systems, and Adaptation Paul Hasler Integrated Computational Electronics (ICE) Laboratory Laboratory for Neural Engineering Georgia Institute of Technology

  2. Things I don’t needed to cover Why use subthreshold devices? or can’t everything be built from op-amps and resistors? What are Floating-gate circuits? Why use neurobiology as inspiration for engineering systems? Where will this be used in an RF application?

  3. Where we work

  4. Laboratory for Neural Engineering Faculty: Robert Butera, Robert Cargill, Steve Deweerth, Bill Ditto, Paul Hasler, Michelle LaPlaca • Key Directions: • Neural Interfacing / Implants • Hybrid Neural-Silicon Systems / Computations • Neuromorphic Engineering

  5. Sensor Circuits, etc. Top-Level View Neurons Interface Circuitry

  6. After three years, what am I up to? • Yet more Floating-Gate Research: • Industrial Strength Circuits • Cooperative Analog-Digital Signal Processing • Silicon Learning • Neural Modeling • Building a single realistic neuron / small networks on a single IC (Density is key)

  7. Overview of Floating-Gate Devices Information Storage Floating-Gate Transistor Modifying Floating-Gate Charge • UV photo-injection • Electron tunneling • Hot-electron injection

  8. Floating-Gate pFET Device Three Classes of Applications 1. Analog or Digital Memory 2. Floating-Gate Circuits 3. Adaptive Circuits

  9. World of Floating-Gate Circuits

  10. E-Pots R. Harrison, A. Bragg, and P. Hasler

  11. Capacitor-Based Circuits Capacitor-Based Design Resistor-Based Design Resistors and Inductors define the circuit dynamics Capacitors and Inductors define the circuit dynamics Capacitors are the natural elements on silicon ICs

  12. Specialized A/D Real world (analog) Compter (digital) ASP IC DSP Processor A/D Where to divide Analog and Digital? Real world (analog) Compter (digital) A/D Convertor DSP Processor

  13. Low-Power Handheld Systems Sensor Signals ASP IC DSP IC Hasler and Anderson

  14. Analog Computing Arrays

  15. Current Directions Analog Side Signal Processing Demonstrate Larger Computational Blocks Generalize both analog and digital approaches in one framework. Develop design tools Reaching Industrial Specs / Reliability

  16. Vin Bandpass Filters, Exp Spaced (Hard in DSP) W2n W25 W24 W23 W1n W22 W14 W13 W12 W11 W21 W15 Iout1 Iout2 Fourier-Based Programmable Filters Programmable Analog Filter C4 filters

  17. Basic Programming Structure

  18. Programmable Filter 1 0 10 10 Individua l Bandpa ss Output Filter Outp ut 0 A-rms) -1 10 10 m Ampli er ( Filt tude o urier -1 f Band -2 10 10 of Fo pass F itude Fourier Filter ilter Output Ampl (V -2 -3 -rms Output 10 10 ) -4 -3 10 10 0 1 2 3 4 5 10 10 10 10 10 10 Frequen cy (Hz)

  19. Vin Bandpass Filters, Exp Spaced (Hard in DSP) W25 W24 W23 W22 W1n W2n W14 W13 W12 W11 W21 W15 Cepstrum Computation Log(Amplitude) Fundamental Brick Iout1 Cepstrum Coefficients Ioutm DCT Coefficients

  20. i = - 2 Vi e Vo = S Wi Vi W i Single-Transistor pFET Synapses Computation Performed Adaptation Performed Density / elegance is critical to large scale systems

  21. Hot-Electron Injection Injection Current is proportional to source current Floating-Gate Voltage 4.319V 4.351V 4.280V 4.352V + + p p n

  22. Autozeroing Floating-Gate Amplifier (AFGA)

  23. pFET circuit has unstable dynamics sd pFET circuit has stable dynamics Dynamics of pFETs and sd-pFETs Source-Degenerated Floating-Gate pFET

  24. Gate-Drain Weight Correlation 1.7 Inputs: Vg = V1 sin wt Vd = V2 sin(wt + q) 1.65 1.6 Vd ampl itude = 0.1896V 1.55 1.5 Sweep q Weight 1.45 Vd ampl itude = 0.1264V 1.4 Fix V1, V2 (two V2 amplitudes) 1.35 Weq - E[ Vd Vg ] = - V1 V2 cos(q) 1.3 1.25 1.2 0 50 10 0 15 0 20 0 25 0 30 0 35 0 Phase dif ference

  25. W = 1 -hE[Vg Vd] - eW Drain-Gate Dynamic Equation

  26. + V tu n + V di bl + + + I I I 1 2 N V V V 2 1 N V d A Floating-Gate Adaptive Node Adap tive Arr ay - V tu n - V di bl - - - I I I 1 2 N -V -V -V 2 1 N - + I = I - I Progr ammed Arra y J. Dugger and P. Hasler

  27. Correlation Data from a Node cos(wt) sin(wt) sin(wt + q) 0.5 0 Synapse 1 Current (mA) -0.5 0.5 0 Synapse 2 Current (mA) -0.5 0 50 100 150 200 250 300 350 degrees

  28. Synapse Weight Solution / Convergence sin(wt) sin(3wt) Desired signal sin(0.7wt) sin(wt) sin(3wt) sin(wt) t = 6.5s

  29. sin(wt) sin(3wt) square(wt) 7 3 6 2 5 (mA) 4 rent 1 Output Current (mA) t Cur 3 Outpu 0 2 -1 1 -2 0 0 10 20 30 40 50 60 70 80 90 0 200 400 600 800 1k 1.2k 1.4k Tim e ( ms) Frequenc y (Hz) Learning a Square Wave

  30. Conclusions • Floating-Gate Devices / Circuits are starting to move towards • the system level, and are moving towards industrial • standards / not user hostile • We can not only build adaptive Floating-Gate circuits, but • floating-gate circuits that adapt as a function of • input “statistics”. • Floating-gate Systems are becoming important tools • in neuromorphic modeling

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