350 likes | 1.04k Views
TCAD for compact modeling . Luca Sponton , Paul Pfaeffli and Lars Bomholt. Outline. Introduction Bringing process information to design PCM example Process-aware SPICE compact models Challenges for TCAD-generated models Summary. Motivation.
E N D
TCAD for compact modeling Luca Sponton, Paul Pfaeffli and Lars Bomholt
Outline • Introduction • Bringing process information to design • PCM example • Process-aware SPICE compact models • Challenges for TCAD-generated models • Summary
Motivation • The impact of variation on product performance and yield grows • Increasing difficulty in keeping strict statistical control on a process • Be able to design robustness against process variation into the product • Be able to optimize manufacturing for product performance Bring process variations to circuit simulation and design
Variations Lead to Yield Loss • Parametric yield loss is caused by variations: • Increasing margins would substantially diminish the advantages of technology scaling. • Corner models could bring to a too conservative design • Corner models do not allow any understanding of the process variation impact on a design Both design and process may contribute to the deviations.
Outline • Introduction • Bringing process information to design • PCM example • Process-aware SPICE compact models • Challenges for TCAD-generated models • Summary
PROS: • Well established methodology • Automatic procedure • Captures most of variability • CONS: • Components are not correlated with underlying process variations • Overestimates • Parameters can assume unphysical values • Stable process flow Traditional flow: data from measurements E-TEST DATA SPICE PARAMETER EXTRACTION CORRELATION ANALYSIS PRINCIPAL COMPONENT ANALYSIS GENERATE EQUATIONS MONTECARLO SIMULATION
How do we bring process information into design? Advantages of TCAD extracted models • TCAD is the ideal tool to characterize process variations • TCAD simulations are accurate, do not drift during time and are available in an early stage of technology development • It is possible to access process parameters and device characteristics that are not controlled or measured accurately in manufacturing • It is cheaper than running large design of experiments on silicon
Process simulation • - DOE of process variations - Device simulations Bringing process to circuit simulation with TCAD Process variability Device characteristics Compact models Full circuit
Process compact models (PCM) • PCM creates a link between the space of process variables and device characteristics through a response surface model Device Characteristic = f(Process Characteristics) • Let us try to do the same for SPICE parameters: Vth0=f1(Tox, Ch_Dose, Ha_dose, Spike_T, …) u0=f2(Tox, Ch_Dose, Ha_dose, Spike_T, …) … • Physically meaningful parameters, that vary smoothly with process variations, allow for a better quality of PCM
Process compact model for SPICE parameters Process variables {Pi} Set of Process variables {P} DOE, n experiments Process simulation n devices PCM PCM generation Device simulations SPICE parameters extraction SPICE model card N SPICE model cards
Consistent extraction from TCAD • Nominal SPICE model obtained from nominal process • Small subset of parameters extracted to take into account process variability • Automatic BSIM3 SPICE parameters extraction for every device in the DOE • Accurate models obtained by a combined local optimization + global refinement • Use of bounded optimization to ensure physical meaning of extracted parameters Extraction of Nominal device Selection of Parameters subset Parameters extraction for whole DOE PCM extraction Use Local Optimization
Outline • Introduction • Bringing process information to design • PCM example • Process-aware SPICE compact models • Challenges for TCAD-generated models • Summary
PCM Example • Full factorial DOE on gate length, gate oxide thickness, Halo implant dose & tilt and channel dose • Nominal device extracted, then a subset of 16 SPICE parameters is used to account for process variations: vth0, Ua, Uc, k1, k2, Voff, Nfactor, eta0,Delta, Vsat, a0, Pclm, pdiblc1, Keta • Computational time is ~ 3h for each process variation. Experiments can be parallelized on a cluster of computers
Consistent extraction • Extracted parameters follow process variations thanks to the local optimization and bounded extraction algorithm
Consistent extraction • Physical meaning of parameters is maintained by the extraction strategy chosen, accuracy may suffer compared to global optimization due to the limited set of parameters chosen • From the full set of SPICE cards a PCM is generated
PCM generation • PCM generated SPICE model accuracy is good using neural networks as response surfaces. Simple polynomial response surface models do not give a good accuracy.
PCM generated SPICE parameters • Predicted models show some error when compared to TCAD simulations: we trade some accuracy for getting the process-design link
Consistent extraction from TCAD • PROS: • Early availability of models • Physically meaningful SPICE parameters • Consistent extraction and PCM allow linking directly SPICE parameters to process variations • CONS: • Nominal device extraction time consuming • Automated extraction flow has to be optimized on the process • Accuracy worse than with global ‘unbounded’ optimization • Model prediction introduces additional error
Outline • Introduction • Process variations to circuit variations • PCM example • Process-aware SPICE compact models • Challenges for TCAD-generated models • Summary
Process-aware SPICE models: PARAMOS • Different approach: embedding process parameters directly into the SPICE model • Extraction of SPICE parameters including PCM parameters through extraction from an entire DOE reflecting the process conditions • Parameter definition: With Mi SPICE parameter, Pi process parameter • Extraction tool: Paramos
Process-Aware SPICE Model: PARAMOS • TCAD simulations • Generate I-V / C-V database for each process parameter set {Pi} • Global SPICE extraction • Create a compact model with process parameters as SPICE library parameters. • Polynomial fitting • Vth = Vth0 + SSai(n)Pin • Voff = Voff0 + SSbi(n)Pin • All curves and coefficients are extracted in a single optimization step Manufacturing Calibration TCAD (process & device) { Pi } I-V, C-V database {Pi} SPICE Extraction Process-Aware Compact SPICE Model{Pi} {Pi} accessible for circuit simulations! Courtesy of S. Tirumala, Synopsys
Case Study • Typical 90 nm Technology • Tox = 16 A, Lg = 65 nm, Vdd = 1.0 V • Normalized variation Dpi: Dpi = (Pi - Pi0)/(Pimax - Pi0) Range of Dpi : from -100% to +100% Courtesy of S. Tirumala, Synopsys
Model TCAD C-V Model TCAD sim Quality of Compact Model Extraction • Excellent fit for I-V curves (rms error < 5%) • Excellent fit for Vt-Lin and Idsat ( <4%) • Acceptable fit for Ioff (<40%) Courtesy of S. Tirumala, Synopsys
Input rise Delay Variation and Sensitivity • Delay is most sensitive to Tox variation . • Varies from -10% to +24% as Dpox changes -100% to +100% • The response to gate length variation (DL) is relatively weak • - 5% to +5% across the full range of DL variation. • Variation around nominal process is non-symmetrical • -10 % vs 24% for min and max variation. Courtesy of S. Tirumala, Synopsys
Outline • Introduction • Process variations to circuit variations • Extraction techniques for variability • Process-aware SPICE compact models • Challenges for TCAD-generated models • Summary
Challenges for TCAD-generated models • There are historically some missing links between TCAD and compact model extraction [1]: • Lithography effects on gate shape • Isolation formation (STI or LOCOS) • Outdiffusion of implanted dopant • … • All these effects are 3D effects not easily accountable for with 2D simulations [1] C.C. McAndrews, “Predictive technology characterization, missing links between TCAD and compact modeling”, Proc. of SISPAD, 2000
Bridging the gap: lithography Lithography effects on gate shape: L.Sponton et al., “A Full 3D TCAD Simulation Study of Line-Width Roughness Effects in 65 nm Technology”, Proc. Of SISPAD, Sept. 2006
Bridging the gap: INWE Narrow width effect on the transistor characteristics
Summary • There is a growing need to understand the effect of process variation on circuit performance • Using calibrated TCAD simulations it is possible to study the effects of slight process variation on device characteristics • Process-aware SPICE models offer a way to bring process variation information to the design sphere • With standard BSIM models it is necessary to trade some accuracy for being able to properly and consistently consider these variations
Acknowledgements • The authors would like to thank people at Synopsys and ETH Zurich for their contribution to the work, in particular Dipankar Pramanik, Shridhar Tirumala, Sathya Krishnamurthy, Yuri Mahotin • Part of this work was financed through the KTI Project “Parametric Design and Analysis for Semiconductor Technology Computer Aided Design (PARA-TCAD)”
Thanks for your attention Luca SpontonSwiss Federal Institute of Technology (ETH)Integrated Systems LaboratoryPhone: +41 44 632 7786 (ETH)Phone: +41 44 567 1555 (SYNOPSYS)Email: luca@iis.ee.ethz.ch