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1364.1 Verilog Synthesis Interoperability Working Group: Status DAC’01. WG has been reactivated following approval of 1364-2001 standard Newly added features being considered for synthesis Teleconference meetings set for every month starting July’01 Goal is to have a final draft ready 2Q2002
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1364.1 Verilog Synthesis Interoperability Working Group: Status DAC’01 • WG has been reactivated following approval of 1364-2001 standard • Newly added features being considered for synthesis • Teleconference meetings set for every month starting July’01 • Goal is to have a final draft ready 2Q2002 • Our web site: http://www.eda.org/vlog-synth • Any questions? Send to Chair: J. Bhasker, jbhasker@cadence.com