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FCU FM status

FCU FM status. Bert-Joost van Leeuwen, SRON-Utrecht. Contents. FM manufacturing status Chopper control Planning. FM manufacturing status [1]. 6 PCB’s assembled 6 PCB’s have passed functional and dc performance tests One PCB has final FPGA mounted (each PCB has one FPGA)

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FCU FM status

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  1. FCU FM status Bert-Joost van Leeuwen, SRON-Utrecht.

  2. Contents • FM manufacturing status • Chopper control • Planning

  3. FM manufacturing status [1] • 6 PCB’s assembled • 6 PCB’s have passed functional and dc performance tests • One PCB has final FPGA mounted (each PCB has one FPGA) • Housing is manufactured, only PUK paint to be applied (in progress now)

  4. FM manufacturing status [2]

  5. FM manufacturing status [3]

  6. FM manufacturing status [4]

  7. FM manufacturing status [5] Problems during manufacturing • 2 PCB’s rejected due to oxidation of solder. • Solution: other cleaning process • Irregular power-up behavior due to excess supply current drawn by HS508BRH analogue multiplexers (2-6mA, while 2mA max is specified). • Manufacturer admits undocumented behavior and states that it is harmless for the component. Unclear is the maximum inrush current that the component may draw (over lifetime, radiation). • Solution: increase of current allowed by limiter

  8. Chopper control [1] Recent problems • Excessive LVDT readout cable dependency (resistance and capacitance) of 1% FSR exceeded short term stability requirement of 0.02% FSR (= 0.2 arcmin) • Step response settling time exceeded the required 20msec significantly (factor 3 or more) Electrical and mechanical resonances caused both problems • LVDT readout frequency was reduced from 10 to 2.6KHz • Filtering in the position control loop was improved to reject resonances at 700 – 1000Hz

  9. Chopper control [2] Test results • Test on FCU-DM2 (com s/n5) + FPC QM-2 • Short term stability 0.03% FSR (RFW) • Step reponse settling time 38msec (RFW) • Test on FCU-FM (both common boards) + FPC QM-2 • Short term stability 0.03% FSR • Step reponse settling time 31msec

  10. Chopper control [3]

  11. Chopper control [4] • Improved dynamic behavior due to: • Improved actuator driver (DM2 setup used ISO stage for second actuator • Improved lay-out design • Chopper control now a rugged design with good performance

  12. Planning • Several technical problems have caused +/- one month delay • We are acquiring two additional test engineers to recover the time spent to solve the problems • Outlook • assembly of all FPGA’s within next 3 weeks • completion of board level tests in one month • start unit integration in one month • start environmental qualification/acceptance tests in 6 weeks • delivery FCU-FM: februari 2006

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