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BIRD98 Effective current drawing dependence from Vds

BIRD98 Effective current drawing dependence from Vds. Antonio Girardi Giacomo Bernardi Roberto Izzi STMicroelectronics Flash Memory Group R&D CAD. Gate Modulation Proposal.

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BIRD98 Effective current drawing dependence from Vds

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  1. BIRD98 Effective current drawing dependence from Vds Antonio Girardi Giacomo Bernardi Roberto Izzi STMicroelectronics Flash Memory Group R&D CAD

  2. Gate Modulation Proposal • The ST “Gate Modulation” solution is based on the introduction of two coefficients, one for the Pullup and one for the Pulldown stage, which modulate properly the IBIS standard current (I_IBIS-STD) when a bouncing noise occurs on the power and ground nodes. I(Vgs, Vds) = Kssn(Vgs,Vds)*I(Vgs=VDD,Vds) Effective SPICE current IBIS standard current I_effective = Kssn(Vgs,Vds)*I_IBIS-STD

  3. Effective Currents Drawing Pulldown I(Vgs, Vds=VDD) table extraction Pullup I(Vgs, Vds=VDD) table extraction Vsweep=[-VDD, VDD]; Vgate is kept stable -- the collected effective current is related to the source voltage (Vs) changes The effective current (I_effective) must be drawn within the saturation zone The above circuits show a possible approach based on holding Vds=VDD Is the Vds=VDD choice the best one for drawing the I_effective current?

  4. VGS=2.2V VGS=2.1V VGS=2V VGS=1.9V VGS=1.8V VGS=1.7V VGS=1.6V VGS=1.5V VGS=1.4V VGS=1.3V VGS=1.2V VGS=1.1V VGS=1V VGS=0.9V Test-case Analyzed • Pulldown stage of a production device (130nm) supplied by VDD=1.8V. The Id-Vds characteristics are the following

  5. Effective Current Extraction: Three cases of Vds=constant have been compared • The effective current (I_effective) has been drawn by considering three different values of Vds, within the saturation zone. Case 1: Vds=VDD=1.8V (current choice proposed) Case 2: Vds=1.55V Case 3: Vds=1.3V Case 3 Vds=1.3V Case 2 Vds=1.55V Case 1 Vds=1.8V

  6. Three Cases’ Effective Currents Comparison I_effect_vds_18 I_effect_vds_155 I_effect_vds_13 • These three cases don’t show a remarkable difference among the currents Current (A) Vsweep voltage (V)

  7. Error Evaluation • The maximum error is less than 3% and it is ~0% in the region in which the first bouncing occurs (Vsweep > 0) • Obviously, the error is related to the channel modulation effect: the lower is such effect, the lower is the error due to the choice of the Vds constant value within the saturation zone • Nevertheless, in the majority of cases, the MOS of push-pull buffers are chosen and designed in order to present a slight channel modulation effect • In addition, considering that the higher is Vgs, the shorter is the saturation region, the best choice may again be Vds=VDD

  8. Vout_case1 Vout_case2 Vout_case3 Three Cases Output Signal Comparison • Three cases’ output signals comparison by simulating a simultaneous switching output (SSO) by using the VHDL_AMS IBIS implementation. Even the output signals don’t reveal critical discrepancies.

  9. Effective Current Drawing by Changing Vds • It has also been explored the case in which the Vds voltage is linearly changed within the saturation zone during the effective current drawing VGS=1.8V VGS=1.7V VGS=1.6V VGS=1.5V Vds changing VGS=1.4V VGS=1.3V VGS=1.2V VGS=1.1V VGS=1V VGS=0.9V VGS=0.8V

  10. I_effect_vds_18I_effect_vds_linear Effective Current Dependence from a linear Vds • Comparing the effective current drawn with the one related to Vds=VDD=1.8V, it is observed a good matching between them. The same considerations of the slide 6 are confirmed too.

  11. VGS=2.2V VGS=2.1V VGS=2V VGS=1.9V VGS=1.8V VGS=1.7V VGS=1.6V VGS=1.5V VGS=1.4V VGS=1.3V VGS=1.2V VGS=1.1V VGS=1V VGS=0.9V Gate Modulation Coefficient Curves • Taking into account the curves of the gate modulation coefficient (Kssn), related to the production device under analysis, it can be noted that in a very large region the Kssn coefficient may be considered independent from the Vds changes. This behavior is an additional confirmation of the previous considerations and results.

  12. Conclusions • The choice of Vds values, constant or no, within the saturation zone, don’t impact on the effective current values if the channel modulation effect is slight • The above statement is also confirmed by observing the Kssn curves • As a result, the proposed choice of holding Vds=VDD during the effective current drawing may remain a good one • Nevertheless, in case of no negligible channel modulation effect, the choice of drawing the effective current by changing linearly the Vds voltage may better interpolate the error due to such effect. • A final decision should be make.

  13. Effective Current Drawing • The same results can be observed considering another device, even in 130nm technology. I_effect_vds_18I_effect_vds_155I_effect_vds_13 Back-up Slide

  14. Output Signals Comparison • A good matching is again observed. Vout_case1 Vout_case2 Vout_case3 Vout_case1Vout_case2Vout_case3 Back-up Slide

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