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4-9 Timer/Counter 控制七段速度

4-9 Timer/Counter 控制七段速度. HT66F50. TM 計時模組 (2.5). 三大類 CTM 精簡型 / STM 標準型 / ETM 增強型 五個功能 計時器 / 計數器 輸入補捉 比對吻合輸出 單脈衝輸出 PWM. CTM 內部結構 ( fig 4-9-2 ). 10 位元上數計數器 TMnD 兩個內部暫存器 TMnA(10 bit) TnRP (3bit) TMnC0 TMnC1 特殊功暫存器 控制計數時脈源 操作模式 輸出特性. CTM 內部結構. CTM 輸出入腳位.

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4-9 Timer/Counter 控制七段速度

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  1. 4-9 Timer/Counter 控制七段速度 HT66F50

  2. TM 計時模組 (2.5) 三大類 • CTM精簡型 / STM 標準型 / ETM 增強型 五個功能 • 計時器/計數器 • 輸入補捉 • 比對吻合輸出 • 單脈衝輸出 • PWM

  3. CTM 內部結構 (fig 4-9-2) 10位元上數計數器TMnD 兩個內部暫存器TMnA(10 bit) TnRP (3bit) TMnC0 TMnC1 特殊功暫存器 控制計數時脈源 操作模式 輸出特性

  4. CTM 內部結構

  5. CTM 輸出入腳位 • TH66F50 計時模組: TM0, TM3 • TM 輸入腳位: TCK0, TCK3 • TM輸出腳位: TP0_0, TP0_1, TP3_0, TP3_1

  6. TMnC0 控制暫存器(表2-5-12) TnPAU TnCK2 TnCK1 TnCK0 TnON TnRP2 TnRP1 TnRP0 Bit 7 6 5 4 3 2 1 0 Bit [7] ; TnPAU = 1, 暫停計數 = 0, 繼續計數 Bit [6 5 4] ; TnCK2 TnCK1 TnCK0 = 000 , fINT= fsys/4 =100, fINT= fINT = 001 , fINT= fsys =101 ,保留 = 010 , fINT= fsys/16 =110 , fINT=TCKn = 011 , fINT= fsys/64 =111 , fINT= TCKn’ Bit [3] ;TnON =1 ,開始計數 =0,停止計數

  7. TMnC0 控制暫存器 TnPAU TnCK2 TnCK1 TnCK0 TnON TnRP2 TnRP1 TnRP0 Bit 7 6 5 4 3 2 1 0 Bit [2 1 0 ] ; TnRP2 TnRP1 TnRP0 = 000 , 週期= 1024x fINT-1 =100,週期= 512x fINT-1 = 001 ,週期= 128x fINT-1 =101 ,週期= 640x fINT-1 = 010 ,週期= 256x fINT-1 =110 ,週期= 768x fINT-1 = 011 ,週期= 384x fINT-1 =111 ,週期= 896x fINT-1

  8. TMnC1 控制暫存器 TnM1 TnM0 TnIO1 TnIO0 TnOC TnPOL TnDPX TnCCLR Bit 7 6 5 4 3 2 1 0 Bit [7 6] ; TnM1 TnM0 = 00 , 比對吻合輸出模式 = 01 , 未定義 = 10 , PWM = 11 , 計時/計數 Bit [0] ; TnCCLR =1, 當比較器A 比對吻合時清除計數器 =0,當比較器p 比對吻合時或計數器溢位清除計數器

  9. TMnC1 控制暫存器 TnM1 TnM0 TnIO1 TnIO0 TnOC TnPOL TnDPX TnCCLR Bit 7 6 5 4 3 2 1 0 Bit [5 4] ; TnIO1 TnIO0 : Tpn_0,Tpn1 (輸出功能) 操作於 compare match, 比對吻合輸出模式時 TnM[1:0]=00) 00: 當比對吻合 輸出不變 10 ,當比對吻合 輸出 1 01: 當比對吻合 輸出 0 11 ,當比對吻合 輸出 轉態 操作於 PWM 模式時 TnM[1:0]=10) 00: 強制為非啟動, 01強制為啟動, 10 PWM輸出, 11未定義 操作於 Timer/Counter 模式時 TnM[1:0]=11, 無作用)

  10. TMnC1 控制暫存器 TnM1 TnM0 TnIO1 TnIO0 TnOC TnPOL TnDPX TnCCLR Bit 7 6 5 4 3 2 1 0 Bit [3] TnOC : Tpn_0,Tpn1 (輸出功能) 操作於 compare match, 比對吻合輸出模式時 TnM[1:0]=00) 1: 在首次比對吻前 輸出維持1 0: 在首次比對吻前 輸出維持0 操作於 PWM 模式時 TnM[1:0]=10) 1: 啟動準位1 0: 啟動準位0 Bit [2] ; TnPOL =1, 反向後再輸出 =0, 直接輸出

  11. 計數時脈源由系統本身TnCK[2:0] 稱為Timer 計數時脈源由外部輸入TnCK[2:0] 稱為Counter 啟動TMnD 計數 (1) 若TnCCLR=1, 當TMnD=TMnA, CTM 會設定TNAF=1, 並將TMnD歸零後繼續計數 (2) 若TnCCLR=0, 當TMnD=TMnA, CTM 會設定TNAF=1,並繼續計數,當TMnD[9:7]計數值與TnPF=1,將TMnD歸零後繼續計數

  12. MFIO暫存器 Bit7 Bit0 T2AF T2PF T0AF T0PF E2AE T2PE T0AE T0PE

  13. 4-9.ASM ;PROGRAM : 4-9.ASM ;FUNCTION: DISPLAY 0~9 FOR 7 SEG USING TMR CONTROL #INCLUDE HT66F50.INC ;-------------------------------------------------------------------- MY_DATA .SECTION 'DATA' ;== DATA SECTION == DEL1 DB ? COUNT DB ? ;-------------------------------------------------------------------- SEG_PORT EQU PD ;DEFINE 7-SEG PORT SEG_PORTC EQU PDC ;DEFINE 7-SEG PORT ; CONTROL REG.

  14. MY_CODE .SECTION AT 0 'CODE' ;== PROGRAM SECTION == ORG 00H ;HT-46RXX RESET VECTOR CLR SEG_PORTC ;CONFIG SEG_PORT AS OUTPUT MOV A,00100000B ;STOP CTM, T0CK[2:0]=010 MOV TM0C0,A ;fINT=fSYS/16 (4MHz/16) ;TOON=0: Timer 不計數 MOV A,11000001B ;Config. CTM in Timer/counter mode MOV TM0C1,A ;TM0D in cleared by TM0CCRA match ;TM0CCRA=1, 計數至 TM0D=TM0A ;清除計數器 MOV A,LOW 1000 ;4 ms (1000/fINT) MOV TM0AL,A ;SET TM0CCRA value low byte MOV A,HIGH 1000 ; [TM0A] is 10 bit MOV TM0AH,A ; SET TM0CCRA value high byte

  15. MAIN: MOV A,OFFSET TAB_7_SEG MOV TBLP,A ;INITIAL POINTER START ADDRESS MOV A,10 MOV COUNT,A ;SET DATA COUNT OF TAB_7_SEG LOOP: TABRDL SEG_PORT ;READ TABLE AND SEND TO SEG_PORT CALL DELAY ;DELAY TBLH*10mS INC TBLP ;UPDATE TABLE POINTER SDZ COUNT ;COUNT DOWN BY 1 JMP LOOP ;JUMP IF NOT TABLE END JMP MAIN ;RESTART

  16. ;********************************************************************;******************************************************************** ; Delay 1 sec [1/ fINT x DEL1(250) x TM0A ;******************************************************************** DELAY PROC SET TOON; START COUNTING DEL_1: MOV A,250; 250*4ms MOV DEL1,A; DEL_2 SNZ T0AF; Compare Match TM0CCRA [bit 5 of MFIO] JMP DEL_2; NO, wait CLR T0AF; Yes, 4ms is over SDZ DEL1; Is 1 sec over JMP DEL_2; No CLR TOON; yes, stop STPU RET; DELAY ENDP ORG LASTPAGE; TAB_7_SEG: DC 03Fh,006h,05Bh,04Fh,066h; 7 SEG CODE for COMMON CODE DC 06Dh,07Dh,007h,07Fh,067h; END

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