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ECE 331 – Digital System Design

Sequential Circuit Design (Lecture #23). ECE 331 – Digital System Design. The slides included herein were taken from the materials accompanying Fundamentals of Logic Design, 6 th Edition , by Roth and Kinney, and were used with permission from Cengage Learning. .

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ECE 331 – Digital System Design

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  1. Sequential Circuit Design (Lecture #23) ECE 331 – Digital System Design The slides included herein were taken from the materials accompanying Fundamentals of Logic Design, 6th Edition, by Roth and Kinney, and were used with permission from Cengage Learning.

  2. Chapter 16: Sections 1 – 5 Material to be covered … ECE 331 - Digital System Design

  3. ECE 331 - Digital System Design Sequential Circuit Design • Understand specifications • Draw state graph (to describe state machine behavior) • Construct state table (from state graph) • Perform state minimization (if necessary) • Encode states (aka. state assignment) • Create state-assigned table • Select type of Flip-Flop to use • Determine Flip-Flop input equations and FSM output equation(s) • Draw logic diagram

  4. ECE 331 - Digital System Design Sequential Circuit Design Given the problem statement, determine the required relationship between the input and output sequences and derive a state table. For many problems it is easiest to first construct a state graph. Reduce the table to a minimum number of states. First, eliminate duplicate rows by row matching and, then, form an implication table and follow the procedure in Section 15.3. If the reduced table has m states (2n – 1 < m ≤ 2n), n flip-flops are required. Assign a unique combination of flip-flop states to correspond to each state in the reduced table. The guidelines given in Section 15.8 may prove helpful in finding an assignment which leads to an economical circuit.

  5. ECE 331 - Digital System Design Sequential Circuit Design Form the transition table by substituting the assigned flip-flop states for each state in the reduced state table. The resulting transition table specifies the next states of the flip-flops and the output in terms of the present states of the flip-flops and the input. Plot next-state maps and input maps for each flip-flop and derive the flip-flop input equations. (Depending on the type of gates to be used, either determine the sum-of-products form from the 1’s on the map or the product-of-sums form from the 0’s on the map.) Derive the output functions. Realize the flip-flop input equations and the output equations using the available logic gates. Check your design by signal tracing, computer simulation, or laboratory testing.

  6. ECE 331 - Digital System Design Examples

  7. Design a sequential logic circuit to realize the following state table: Example #1: FSM Design ECE 331 - Digital System Design

  8. Design in progress … Example #1: FSM Design ECE 331 - Digital System Design

  9. My solution using D Flip-Flops: Example #1: FSM Design ECE 331 - Digital System Design

  10. ECE 331 - Digital System Design

  11. ECE 331 - Digital System Design

  12. ECE 331 - Digital System Design

  13. ECE 331 - Digital System Design

  14. The author's solution using D Flip-Flops: Example #1: FSM Design State assignment

  15. My solution using JK Flip-Flops: Example #1: FSM Design ECE 331 - Digital System Design

  16. ECE 331 - Digital System Design

  17. ECE 331 - Digital System Design

  18. ECE 331 - Digital System Design

  19. The author's solution using JK Flip-Flops: Example #1: FSM Design

  20. Future site of a second example. Example #2: FSM Design ECE 331 - Digital System Design

  21. ECE 331 - Digital System Design Questions?

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