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Hybrid Data Structure for IP Lookup in Virtual Routers Using FPGAs. Authors: Oĝuzhan Erdem , Hoang Le, Viktor K. Prasanna , Cüneyt F. Bazlamaçcı Publisher: IEEE ASAP , 2011 Presenter: Jia-Wei,Yo Date: 2011/12/14. Introduction.
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Hybrid Data Structure for IP Lookup in Virtual Routers Using FPGAs Authors: OĝuzhanErdem, Hoang Le, Viktor K. Prasanna,CüneytF. Bazlamaçcı Publisher: IEEE ASAP , 2011 Presenter: Jia-Wei,Yo Date: 2011/12/14
Introduction • Several ideas use leaf pushing and an additional shared search structure to eliminate the high memory bandwidth requirement. • increases the complexity in updates • decreases the memory efficiency by introducing data redundancy in the share next hop structure. • Don’t scale well as the number of virtual routers increases.
Introduction (1)A compact trie representation and a hybrid data structure for IP lookup that reduce the memory requirement. This structure does not need backtracking while preforming a search. (2)A merging algorithm that eliminates leaf pushing and simplifies the table updates in virtual routers. (3) A linear pipelined SRAM-based architecture on FPGAs that can support up to 3.1M IPv4 prefixes, while achieving a sustained throughput of 394 million lookups per second.
Hybrid data structure Definition Active part (AP) of a prefix is the bit string between the most and least significant set bits of a prefix including the most significant set bit but not the least significant set bit.
Hybrid data structure AP Example : 0010100* , 01001* , 1000* , 1001* 0010100* => 10* 01001* => 100* (conflict) 1000* => * 1001* => 100* (conflict)
Hybrid data structure • Solve conflict prefixes • most significant set bit position (M) • number of trailing zeros (L) • Size of L is , W denote the maximum length of an IP and k is the number of virtual table. • Size of M is also ,it’s can reduce to , if the virtual ID including all 0’s is not used.
Hybrid data structure-Constructing A singlebinary trie is constructed for all the prepended prefixes of the virtual tables, using only their active part. Trieis shallower and denser than a traditional binary trie. Extra information is stored at each node to distinguish the conflicted prefixes. An auxiliary data structure can be constructed for the conflicted prefixes.
Hybrid data structure-Update Prefix insertion: If the new prefix conflicts with the existing prefixes, then the new prefix is added to the tree data structure.Otherwise, it is added to the triedata structure. Prefix deletion: The target prefix is located and its valid bit is reset. Route change: The target prefix is located and its next hop information is updated.
Architecture And Implementation On FPGA There are at most W + stages in the trie pipeline
Performance Xilinx ISE 12.4 with Xilinx Virtex-6 XC6VSX475T with -2 speed Clock period 5.084 ns Capable running at 197MHz Using dual-pipeline ,support 394 million lookups per second , or 126 Gbps ( for the minimum packet size of 40 Bytes )
Performance The number of conflict prefix is less than 10% of the total number of prefix.