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2009 ITRS Emerging Research Materials [ERM] March 18-20, 2009. Michael Garner – Intel Daniel Herr – SRC. ERM Outline. Scope Introduction Difficult Challenges Challenges for Multi-application ERM (Back-up?) Materials for Alternate Channel CMOS (PIDS & ERD) Critical Assessment
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2009 ITRSEmerging Research Materials[ERM]March 18-20, 2009 Michael Garner – Intel Daniel Herr –SRC
ERM Outline • Scope • Introduction • Difficult Challenges • Challenges for Multi-application ERM (Back-up?) • Materials for Alternate Channel CMOS (PIDS & ERD) • Critical Assessment • ERM for Beyond CMOS Logic (ERD) • Materials for Memory Devices • Critical Assessment • ERM for Lithography • Resist (pixilated, Multi photon resist, novel) • Self Assembled Materials • Transition Table (Molecular glasses, evolutionary resist macromolecular design, etc.) • ERM for FEP & PIDS • Deterministic Doping • Self Assembly for Selective Deposition & Etch • ERM for Interconnects • ERM for Assembly & Package • ERM ESH Research Needs • ERM Metrology Needs • ERM Modeling Needs
X-cutting Challenges • LDM • Control of placement & direction • Control of nanostructure, properties & macro properties • Contact & Interface issues • Self Assembled Materials • Control of placement, defects, and registration • Complex metal oxides • Control of properties, interfaces, defects, and moisture degradation
III-V Ge Alternate Channel Partition Proposal PIDS III-V & Ge Potential Solution SiGe P-FET with Si N-FET Collaborate with ERD on device Readiness ERM Materials, Interfaces & Process Issues & Challenges Critical Assessment of Materials & Integration Capabilities ERD Integrated Device Performance Assessment & Challenges (For different structures surface, buried channel, etc.) Critical Assessment of Device Performance FEP Potential Solution: SiGe P-FET with Si N-FET III-V & Ge Potential Solution Track III-V & Ge Issues
ERM Device Materials Outline Emerging Logic Materials • Alternate Channel Materials for Equivalent Scaling • III-V Epi Materials • Ge Epi Materials • Graphite and Graphitic Materials • Nanowires • Carbon Nanotubes • Critical Assessment • Contact Materials (?) • Beyond CMOS Logic Materials • Spin Materials • Ferromagnetic Semiconductors (III-V & Oxides) • Magnetoelectric Materials (Alloys, Heterostructures, superlattices) • Spin Injection Materials (Low barrier ferromagnetic metals, half metals, etc) • Spin Tunnel Barriers (MgO, etc) • Semiconductor & nanostructure Spin Transport properties (Si, Ge, Graphene, CNT, etc), • Strongly Correlated Electron State Materials (Metal-Insulator) • Molecular Devices (?) • Emerging Memory Materials • Molecular Devices (?) • Complex Metal Oxides • Critical Assessment (?)
Materials for Alternate Channel Logic • Alternate Channel Materials for Equivalent Scaling • III-V Epi Materials (John Carruthers) • Ge Epi Materials (John Carruthers) • Graphite and Graphitic Materials (Jeff Peterson & Daniel Bensahel) • Nanowires (Ted Kamins) • Carbon Nanotubes (Jean Dijon, Miyamoto-san, Awano-san) • Critical Assessment • Contact Materials (?)
III-V & Ge Key Messages • Gate Dielectric Growth techniques are being developed • Current Approaches (III-V): • MBE Growth of III-V/Ga2O3/GdGaO Stack (Freescale) • As Cap/ In situ As decap +ALD HfO2 (Stanford) • NH4OH-ALD Al2O3 or HfO2 on III-V (Purdue) • InAlAs Barrier (MIT) • Current Approaches (Ge): • GeOxNy Nitridation (Stanford) • Ozone Oxidized Ge + ALD High κ dielectric HfO2 (Stanford) • LaGeOx-ZrO2(Ge) High K (Dual Logic) • Controlling surface oxide formation is critical for control of interface states • Control of interface stochiometry, structure and defects is critical • GeOx stochiometry control affected by growth temperature
III-V & Ge Key Messages • Ge dopant activation requires high temperature • Incompatible with III-V process temperatures • S/D Contact Formation Current Approaches: • Ge • P-MOS: Boron with many ohmic metal contact options • N-MOS: Dopants have high diffusivity & metals schottky barriers • III-V • W contact/InGaAs cap/InAlAs (MIT) • Are barriers needed to keep dislocations out of the channel?
III-V Ge Heteroepitaxy Challenges • Reduction of dislocation densities • Control of stress in III-V & Ge integrated on Si • Ultrathin films • Heterostructures to reduce defects • Effect of antiphase domains on carrier transport • Identify a crystal orientation that favors epitaxy and interface states.
Graphene Challenges & Status • Ability to deposit graphene on appropriate substrates • Producing a bandgap • Fabricating Narrow Graphene Lines • Applying a high electric field to bi-graphene • Achieving high mobility in an integrated structure • Achieving a high on-off conduction ratio
Graphene Deposition • CVD of Graphene on Ni, Pt, and Ir • Graphene is strongly bonded to Ni, but has a lattice match • Graphene deposited on Pt is not distorted, is not lattice matched, but is weakly bonded • SiC decomposition • Issue: High process temperature (>1100C) • Exfoliation Techniques • Graphene Oxide Decomposition (Mobility <1000cm2/V-sec) • Oxidation process produced islands of graphene surrounded by disordered material (hoping conduction) • Try less aggressive oxidation process • Solvent exfoliation • Solvents capable of separating graphene sheets are difficult to evaporate (high boiling point) • Tape exfoliation
Producing a Graphene Bandgap • Fabricating Narrow Graphene Lines • Requires patterning sub 20nm lines • Edge defect control is challenging (Eg & Mobility) • Applying a high electric field to bi-graphene • Field ~1E7 V/cm
Graphene Mobility • Mobility on substrates is reduced • Graphene Oxide Mobility • Degraded by disordered regions
Nanowire Challenges Based on 2007 ERM the key challenges were: • Position the nanowires during growth or reposition them after growth at the desired location and with the desired direction • Provide performance exceeding patterned materials • CMOS compatible catalysts. • Additional • Integration of dopants • Gate Dielectric interface passivation
Nanotube Challenges • Control of: • Location • Direction • Bandgap (Chirality & Diameter) • Carrier type & concentration • Gate Dielectric Deposition • Contact Resistance
Nanowire 2009 Potential Technology Advantages • Status of demonstration Key Challenges & Status • Position the nanowires during growth or reposition them after growth at the desired location and with the desired direction • Provide performance exceeding patterned materials • CMOS compatible catalysts. • Additional • Integration of dopants • Gate Dielectric interface passivation
Beyond CMOSM. Garner • Molecular State (Alex Bratkovski & Curt Richter) • Spin Materials (U-In Chung / Kang Wang, Nihey-san) • Ferromagnetic Semiconductors (III-V & Oxides) • Magnetoelectric Materials (Alloys, Heterostructures, superlattices) • Spin Injection Materials (Low barrier ferromagnetic metals, half metals, etc) • Spin Tunnel Barriers (MgO, etc) • Semiconductor & nanostructure Spin Transport properties (Si, Ge, Graphene, CNT, etc),
Spin Materials • Ferromagnetic III-V (Mn) semiconductors have verified Curie temperatures 100-200K • Carrier mediated exchange • Nanowires of GeMn have reported ferromagnetic properties at 300K+, but carrier mediated exchange with gated structure is difficult to verify • Oxides doped with transition metals have ferromagnetic properties • Ferromagnetism can be controlled with carrier doping, but it isn’t clear whether this can be modulated with electric fields • Ferromagnetism is proposed to be in an impurity band vs. the oxide bands. • It is not clear whether this is useful for device applications
Spin Materials (Cont.) • Spin Tunnel Barrier Materials • MgO crystalline material is the best spin selective tunnel barrier to date • May work with a limited number of materials due to lattice match requirement • Films must be ~9A thick • Al2O3 films work, but with much lower selectivity • Multiferroics • Need higher coupling coefficient (Electrical to Magnetic) • Nanostructures • Heterostructures • BaFeO3 has ferroelectric & antiferromagnetic properties coupled • Limited degrees of freedom & low coupling
Strongly Correlated Electron State Materials (For Spin Logic)(Kariya-san) • Potential Physics of Interest • Competing Non-Ferromagnetic/ Ferromagnetic Phase Transitions • Nanoscale phase segregation near phase transition compositions • Magnetic fields can convert the phases (multi Tesla) • Insulator to Ferromagnetic Metallic state • Carrier doping may be able to cause the transitions • Electric Field • Issues: • Most phase transitions occur below room temperature • Phase transitions may be first order • “Pure” phases may not exist (Nanoscale phase segregation)
Strongly Correlated Electron State Heterointerfaces (For Spin Logic)(Kariya-san) • Oxide heterointerfaces don’t appear to have interface pinning • Interfacial reconstruction at charged interfaces • Charged interfaces result in interface reconstruction • Hole doped interfaces are “metallic”
1st Order Phase Transitions • Coexistence of competing phases
Heterostructures • Surface reconstruction hole generation • No polar discontinuity except at STO/LaAlO3 interface
Oxide Memory Materials • Multiple mechanisms proposed • Phase transformation • Change of polarization alignment (E or H) • Nanofilament formation • Cation migration • Anion Migration • Oxygen Vacancies • Should we assess the consequences of the different mechanisms? (Scaling & Reliability) • Resistance Change • Ferroelectric FET & Barrier • Mott FET
Mechanism Assessment • Cation migration (Ag, Cu) Filament formation • Anion migration • Vacancy Migration • Charge Trapping (Vacancies or defects) • Electronic Phase Transition • Mott FET
Oxides interfaces In December 2007, the journal Science considered the recent discoveries emerging from oxide interfaces as one of the 10 breakthrough of the year 2007 • New properties arise from surface, electronic or orbital reconstructions. (Stacking for example two insulating compounds such as LaAlO3 and SrTiO3 can lead to a metallic or superconducting LaAlO3/SrTiO3 interface) • Interfaces in superlattices can change the nature of the coupling between competing instabilities and produce new properties. • (superlattices combining the proper ferroelectric PbTiO3 and the paraelectric SrTiO3 compounds behave like a prototypical improper ferroelectric due to interface coupling based on rotational distortions). 32 C. Dubourdieu - LMGP-CNRS & D. Bensahel - STMicroelectronics - France
Perovskite Challenges • Ferroelectrics: Electrode Interactions • Pt: Hydrogen ion generation degrades polarization • SRO: Increases resistance • Strongly Correlated Electron Material Challenges (Mott M-I Transition) • Nanoscale phase segregation may suppress sharp transition • Materials are very sensitive to stress (Piezo effects) • Selection of substrate & interface layers • “Disorder” can dramatically reduce critical temperatures
Molecular Devices • Top contact formation is still a significant issue • Determining that switching is due to the molecular energy levels is difficult