2009 Emerging Logic Devices

1. 2009 Emerging Logic Devices ERD Working group George Bourianoff June 25, 2009

2. Status

3. CNT FETs • Prepared by Mike Garner • HF characterization and operation – measured ft of 4 GHz, projected ft of 6.3 THz • Circuit speeds much lower (220 Hz?)

4. Nanowire FETs • Prepared by Shamik Das • Expanded set of materials • (GaN, AlN, InN, GaP, InP, GaAs, InAs), II-VI materials (CdSe, ZnSe, CdS, ZnS), as well as semiconducting oxides (In2O3, ZnO, TiO2), etc • Additional fabrication methods - VLS • No additional circuit verifications since 2005??

5. Update to SET entry • Update prepared by Dr. Akira Fujiwara, NTT labs • Principle change is in “demonstrated Switch speed” • In 2007, value was 2 GHz obtained from capacitance measurements • In 2009, value of 2 GHz is retained but was obtained from direct RF measurements and reference is provided • In addition, some references were updated • Not a tremendous amount of activity • Should we move this to transition table in 2011?

6. Atomic Switch • Table entries • This is a table 3 entry • Many of the parameters for a table 2 entry are known • Should we create a column in both Table 2 and 3? • Prepared by T Hasegawa • Switching times of 20 MHz and 1011 repetitions demonstrated for 2 terminal device • challenges are understanding device physics, nonvolatile device physics

7. Atomic Switch table entries

8. Section prepared by Alan Seabaugh, ND Low static power dissipation Challenges is low voltage (1 V) at GHz frequencies Reliability, repeatably and burn out Table entries This is a table 3 entry Many of the parameters for a table 2 entry are known Should we create a column in both Table 2 and 3? MEMS switch

9. MEMS Switch table entries • Entries and References for Logic Table [2] • NEM Switches • NEMFET • Cell Size Projected 100 nm • Cell Size Demonstrated 900 nm [3] • Density Projected 1E10 devices/cm2 • Density Demonstrated 1 devices/cm2 [2] • Switch Speed Projected 1 GHz [4] • Switch Speed Demonstrated <0.18 GHz [5] • Circuit Speed Projected 1 GHz • Circuit Speed Demonstrated <0.18 GHz • Switching Energy Projected 5E-17 J [6,7] • Switching Energy Demonstrated J • Binary Throughput Projected 10 Gbit/ns/cm2 • Binary Throughput Demonstrated Gbit/ns/cm2 • Operational Temperature RT • Materials System: Al, polySi, TiN, CNT • Research Activity (2008-2009) 20 NEM switch publications • Entries for logic Table 3 • NEM Swtich • State variable charge • Response function mechanical position • Class example NEMFET • Architecture von Neumann • Application logic • Constraints mechanical • Pros <60 mV/dec • low static power • complementary • CMOS compatibility • radiation tolerant • Cons delay > 1 ns • VT >1 • wear. stiction • bounce • Status demo • Material issues sticktion, • contact wear

10. Excitonic electron hole Bose Einstein Condensates Above room temperature Bi-layer graphene systems theoretically predicted Graphene because of AB stacking, valence –conduction band symmetry, low density of states, low defencts, … Electron transport controled by gate bias Table 3 entry Ultra low power ~10-20 J/op Reasonably fast ~100GHz Room Temp operation Non CMOS like I/V characteristics > non CMOS like circuits Pseudospin devices

11. BISFET table entries

12. Ferromagnetic logic and MQCAs • Minor updates from previous version • Creation of biaxial anisotropy • Current driven moving domain wall gates • New results on power dissipation in nanomagnetic circuits (ripple adder) relative to CMOS

13. Summary • Chapter had contained 19 entries in 3 tables • 4 contributors have not sent anything • 5 contributors sent text but are missing table entries • 8 entries are • 1 will not be done – novel S/D architectures