Performance Evaluation of Two Allocation Schemes for Combinatorial Group Testing Fault Isolation

1. Performance Evaluation of Two Allocation Schemes for Combinatorial Group Testing Fault Isolation Rawad N. Al-Haddad, Carthik A. Sharma, Ronald F. DeMaraUniversity of Central Florida

2. Agenda • Overview of Group Testing Algorithms • Overview of Fault Handling Techniques • Multi-stage Adaptive Group Testing • Equal Share Allocation Scheme • Interleaved Allocation Scheme • Performance Comparison of Allocation Strategies

3. Group Testing Algorithms • Origin – World War II Blood testing • Problem: Test samples from millions of new recruits • Solution: Test blocks of sample before testing individual samples • Problem Definition • Identify subset Q of defectives from set P • Minimize number of tests • Test v-subsets of P • Form suitable blocks

4. Fault-Handling Techniques Device Failure Characteristics Duration: Transient: SEU Permanent: SEL, Oxide Breakdown, Electron Migration, LPD Device Configuration Processing Datapath Device Configuration Processing Datapath Target: BIST CGT-Based Repetitive Readback Approach: TMR STARS CED Dueling Methods Duplex Output Comparison Supplementary Testbench Duplex Output Comparison Detection: Cartesian Intersection Isolation: Bitwise Comparison Majority Vote Repetitive Intersections Fast Run-time Location Worst-case Clock Period Dilation Diagnosis: unnecessary Evolutionary Algorithm using Intrinsic Fitness Evaluation Recovery: Replicate in Spare Resource Select Spare Resource Invert Bit Value Ignore Discrepancy

5. Isolation Problem Outline Objectives • Locate faulty logic and/or interconnect resource: a single stuck-at fault model is assumed • Online Fault Isolation: device not entirely removed from service Two Schemes: • Equal Share: • Suspect resources are divided into equal subsets, each subset is assigned to one individual in the population, • Each suspect resource is guaranteed to be covered by at least one individual • Interleaved: • Suspect subsets are shared among individuals, • Coverage Factor (CF) determines the minimum number of individuals ( 1) which utilize each resource in the suspect pool

6. Equal Share Allocation Allocation Strategy • Suspect pool of N LUTs • Population of R individuals • Each individual gets M suspect resources, where M = N/R. • Maximal possible gain if the fault is articulated by the test vectors is a factor of R (from N suspect resources to M) • Minimal possible testing phase gain: No gain at all if fault is not articulated

7. Experiments • Experimental Setup • DES-56 encryption circuit • Xilinx ISE design tools to place and route the design • Virtex II Pro FPGA device • Fault Injection and Analysis Toolkit (FIAT) • Application Programmer Interfaces (APIs) to interact with the Xilinx ISE tools to inject and evaluate faults • Editing the design file rather than the configuration bitstreamsto introduce stuck-at-faults • Editing User Constraint Files (UCF) to control resource usage

8. Equal Share Results Total number of runs for each group count Number of test vectors required in each run

9. Interleaved Allocation Allocation Scheme • Each LUT in the suspect pool is utilized by more than one individual in the population • Implies “interleaving” of individuals over each LUT. • Interleaving degree decided by Coverage Factor. • Coverage factor (CF): Number of individuals utilizing each resource in the suspects pool • Example: CF = 2 means that each suspected LUT is covered by two different individuals.

10. Interleaved Allocation Scheme • N LUTs divided into M subgroups where M = N/R • Each individual utilizes 2M LUTs • Discrepancy will reduce the number of suspects to 2M rather than M • However, (100/CF)% less chance of unarticulated faults. Interleaved Allocation scheme with CF = 2

11. Two-Pass Algorithm • Pass one: • Reduce suspect list from N to CFN/R, where CF is the coverage factor • Isolation granularity gain is reduced when CF is increased. • Terminated once the first discrepant output is observed. • Pass Two • Reduce suspect list from CFN/R to N/R (same gain as Equal Share) • New data structure is introduced to expedite the process. • Called Interleaved Individuals Set(IIS)

12. Interleaved Individuals Set • Purpose: • Keep track of the interleaved individuals in a specific CGT configuration • Example: In pass two, individuals interleaving with the one which articulated the fault in pass one will be tested.

13. Conclusion • Equal Share: • Best Case: Suspect List reduced from N to N/R • Worst Case: Zero gain (unarticulated fault) • One pass only • Interleaved • Best Case: Suspect List reduced from N to N/R • Performed in two passes (N CFN/R N/R) • IIS minimizes overhead in Pass two • Worst Case: Zero gain also. • BUT, less chance to occur than Equal share scheme (because of interleaving)

14. References • Sharma, C. A. and R. F. DeMara (2006), “A Combinatorial Group Testing Method for FPGA Fault Location,”in Proceedings of the International Conference on Advances in Computer Science and Technology (ACST 2006), Puerto Vallarta, Mexico, 2006 • Du D and Hwang, F. K (2000),"Combinatorial Group Testing and its Applications," Series on Applied Mathematics volume 12, World Scientific. • Sharma, C. A. (2007), "FPGA Fault Injection and Analysis Toolkit (FIAT)."