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Designing Asynchronous Arbiters using Petri Nets. Alex Yakovlev Newcastle University, UK. What is an Arbiter?. Client 1. Client 2. Client 1. G. G. G. D. D. D. Adaptor 1. Adaptor 1. Adaptor 1. Example: “lazy token” ring adaptor. R. R. R. Client 1. Client 2. Client 1. G. G.
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Designing Asynchronous Arbiters using Petri Nets Alex Yakovlev Newcastle University, UK Dagstuhl Seminar
What is an Arbiter? Dagstuhl Seminar
Client 1 Client 2 Client 1 G G G D D D Adaptor 1 Adaptor 1 Adaptor 1 Example: “lazy token” ring adaptor R R R Dagstuhl Seminar
Client 1 Client 2 Client 1 G G D D Adaptor 1 Example: “lazy token” ring adaptor R R R G D Lr Rr La Ra Adaptor 1 Adaptor 1 Dagstuhl Seminar
R G D Rr Lr Ring adaptor Ra La Lazy ring adaptor Lr R dum dum G Rr La D Ra t=0 (token isn’t initially here) t=1 t=0 Dagstuhl Seminar
Lazy ring adaptor Lr R R dum G D dum Rr Lr G Rr Ring adaptor Ra La La D Ra t=0->1->0 (token must be taken from the right and past to the left t=1 t=0 Dagstuhl Seminar
Lazy ring adaptor Lr R R dum G D dum Rr Lr G Rr Ring adaptor Ra La La D Ra t=1 (token is already here) t=1 t=0 Dagstuhl Seminar
Lazy ring adaptor Lr R R dum G D dum Rr Lr G Rr Ring adaptor Ra La La D Ra t=0->1 (token must be taken from the right) t=1 t=0 Dagstuhl Seminar
Lazy ring adaptor Lr R R dum G D dum Rr Lr G Rr Ring adaptor Ra La La D Ra t=1 (token is here) t=1 t=0 Dagstuhl Seminar
R G D Rr Lr Ring adaptor Ra La Lazy ring adaptor Lr R dum dum G Rr La D Ra t=0 (token isn’t initially here) t=1 t=0 Dagstuhl Seminar
Arbitration refinement • Asynchronous circuits often require elements to resolveconflictswhich are intentionally “pre-programmed” in specifications • These elements are similar to semaphores (etc.) in concurrent programs • These elements are different from logical gates because they involve internally analogue components • The LPN model must be refined to explicitly “factorise” non-persistent behavior from the rest of the model – the latter can be synthesized using logic gates E.g. Request-Grant-Done (RGD) arbiter D RGD arbiter G1 R1 G2 R2 Dagstuhl Seminar
Arbitration refinement E.g. Request-Grant-Done (RGD) arbiter p D RGD arbiter G1 R1 b a G2 R2 Dagstuhl Seminar
Arbitration refinement E.g. Request-Grant-Done (RGD) arbiter p D RGD arbiter G1 R1 b a G2 R2 Assume a and b are circuit actions that are in conflict (may disable each other) and need to be protected Dagstuhl Seminar
Arbitration refinement E.g. Request-Grant-Done (RGD) arbiter p p D G1 D RGD arbiter R1 R1 R2 me b a G2 R2 G1 G2 a Assume a and b are circuit actions that are in conflict (may disable each other) and need to be protected b Dagstuhl Seminar
Arbitration refinement E.g. Request-Grant-Done (RGD) arbiter p p D G1 D RGD arbiter R1 R1 R2 me b a G2 R2 G1 G2 a b a and b are protected now (they are no longer disabled) Dagstuhl Seminar
Translation of LPNs to circuits • After appropriate refinements have been made one can translate Labelled Petri nets (or Signal Transition Graphs) into circuits • Either by syntax-direct translation • Or by using Logic Synthesis Dagstuhl Seminar
Why direct translation? • Direct translation has linear complexity but can be area inefficient (inherent one-hot encoding) • Logic synthesis has problems with state space explosion, repetitive and regular structures (log-based encoding approach) Dagstuhl Seminar
Direct Translation of Petri Nets • Previous work dates back to 70s • Synthesis into event-based(two-phase) circuits (similar to Sutherland’s micropipeline control) • S.Patil, F.Furtek (MIT) • Synthesis into level-based (4-phase) circuits (similar to synthesis from one-hot encoded FSMs) • R. David (’69, translation FSM graphs to CUSA cells) • L. Hollaar (’82, translation from parallel flowcharts) • V. Varshavsky et al. (’90,’96, translation from PN into an interconnection of David Cells) Dagstuhl Seminar
Synthesis into event-based circuits • Patil’s translation method for simple PNs • Furtek’s extension to 1-safe net • “Pragmatic” extensions to Patil’s set (for non-simple PNs) • Examples: modulo-N counter, Lazy ring adapter Dagstuhl Seminar
Patil’s set of modules Circuit equivalent: Petri net fragment: wire place inverter marked place C-element join C XOR merge fork fan-out Effectively RGD arbiter shared (conflict) place S switch Dagstuhl Seminar s
Direct synthesis example(lazy token ring adapter) Exercise: Refine this initial LPN and map it (fragment-by-fragment) to the circuit Dagstuhl Seminar
Synthesis by using Signal Transition Graphs • It is also possible to synthesise such Petri net specifications using automated async logic synthesis tools • Petrify is a tool which takes a Signal Transition Graph (STG) and returns a logic implementation • As an arbiter a two-way Mutual Exclusion element (MUTEX) is often used Dagstuhl Seminar
Lr+ R+ me r2+ r1+ t=1 g1+ g2+ t=0 Rr+ Rr+ G+ s+ Ra+ Ra+ t- R r+ s+ La- G+ Rr- Rr+ La+ Lr- r1- R- Ra- Ra- Lr+ r2- r1- r2- g1- g2- G- s- La- Refined STG Dagstuhl Seminar
G R r1 g1 ME r2 g2 Rr Lr La Ra Logic Circuit synthesised automatically with a tool Dagstuhl Seminar
Points for further exploration • Sometimes it is hard to insert mutex events and then “factorise out” a simple 2-way mutex or RGD arbiter from the rest of the logic • For example, problematic cases are usually arbitration with multiple clients and multiple resources • A lot of manual effort is needed in decomposing an original model there Dagstuhl Seminar
Example: 2-client 2-resource arbiter Difficult part is here Dagstuhl Seminar