Lab Next Week – Nov 7 & 8 DEDICATED PROTOTYPING LAB

1. Lab Next Week – Nov 7 & 8DEDICATED PROTOTYPINGLAB

2. Nov 14-15, Presentation 3 (P3) Objectives • Complete Initial Detail Design • Complete Initial Detail Design Analysis, Prove DFM • Prepare & Practice Detail Design Presentation P3 Main Deliverables: • Single Integrated Powerpoint Presentation File • Block Designs Integrated into Overall Project Presentation • Brief Walk Through of Product Level Slides • 10-15 Min Per Student for Block Design Slides • Emphasis on Detailed Design, DFM Analysis and Component Justifications • Significant Reuse of P2 slides • However update as needed • ~ 1:45 Max Time Per Team • Slide content & order follows. Lab Slides in Blue

3. Detailed P3 Slide Order • P2 Deliverables Re-used From Labs 1-2 • All Project Proposals including block diagrams (Appendix) • Selection Process including systematic scoring system (Appendix) • Recommended Project – Summary Page • Refined Block Diagram • Perf Requirements Summary – Showcase Key Requirements • Std Requirements Summary – Showcase Key Requirements • Product Safety Requirements/Standards Summary Slide(s) – Lab 2A • Product EMC Requirements/Standards Summary Slide(s) – Lab 2B • Basic Business Case • Block Diagram Description Page • Requirements Spreadsheet: Project Level Tabs (Excel File – Appendix) • Requirements Spreadsheet: Block Level Tab Flowdowns (Excel File – App) • Key Risk Areas • 3 Key Patents (IP) Found for Product Area Labs 1A-B Lab 1C

4. Detailed P3 Slide Order • P2 Deliverables Re-used From Labs 3 - 4 • Product Level Design Plan Summary & Gantt Chart Slides – Lab 3 • Overall Prototype Plan – Lab3 • Product Overall Reliability Rollup Summary Slide(s), Final Warranty – Lab 4 • Product Overall Reliability Growth Plan (Optional) Slide(s) – Lab 4 • Product Overall Mfg Assembly and Test Process Diagram – Lab 6 Insert Block Design Slides Here

5. Detailed P3 Slide Order • Block Design Slides- Note Re-use From P2(New Slides in Green) • Block Description and Purpose Slide(s) – P2 • Include location of Block in overall block diagram, Describe Purpose of Block • Block Performance & Standard Requirements Summary - New • Include ALL Safety, EMC and Reliability Requirements • Show All % Allocations from Product Level • Block Breakdown Diagram Slide (Block Diag of the Block) – P2 • Block Signal Input/Output Summary Slide(s) – Lab 2A • Block Prototype Schematic – Lab 3 • 5-6 Bullets Describing Theory of Operation

6. Detailed P3 Slide Order Block Design Slides Cont- Note Re-use From P2(New Slides in Green) • Detailed Design Calculations & Component Selections – Min 3 slides • Show all Calculations and Selection Rationale for ALL Components and Their Attributes • Device Package Type Rationale • Nominal Resistance, Capacitance, Inductance Values & % Tolerance Calculations • Resistor Compositions, Capacitor Dielectric, Inductor Winding; Selection Rationale • Resistor, Capacitor, Inductor, Diode, Transistor & IC Max Voltage Calculations • Resistor, Inductor, Transistor, Diode, Xfmr, & IC Max Power Calculations • Power Electronics Heat Sink qj Calculations and Max Die Temp Rise Above Ambient • EMC Devices including filters, ferrites, transient absorbers, etc • Safety Devices such as Current Limiters incl Fuses, Breakers, GFCI, etc • Wire Gauges, Interconnect Contact, & Trace Width Ratings • Op-Amp Selections including Ib, Vio, CMRR, Slew Rate, Iout & Error Voltage Calculations • Logic Family Selection including Interface Compatibility, Speed, Power • CPU and/or PLD Types and Clock Speed, Performance Capabilities • Regulator Basic Performances incl % line and % load regulations • Nominal Time Domain Operational Simulations • Nominal Frequency Domain Operational Simulations • Worst Case or Monte-Carlo Simulations • Additional Analog Circuit DFM Analysis as applicable

7. Detailed P3 Slide Order Block Design Slides Cont- Note Re-use From P2(New Slides in Green) • Additional Detailed Design Calculations & Component Selections – (Optional) • Digital Circuit DFM Analysis as applicable (Lab 8) • Power Circuit DFM Analysis as applicable (Lab 8) • Any Firmware & Programming Design Descriptions • Flow Charts • State Diagrams and Bubble Charts • Description of Development Tools and Environment • Configurations and Setup

8. Detailed P3 Slide Order Block Design Slides Cont- Note Re-use From P2(New Slides in Green) • Block Prototype BOM – Lab 3 • Block Production BOM – Lab 5 • Block Prototype Netlist – Lab 3 • Block Prototype Layout – Lab 3 • Block Production Schematic, Netlist & Layout (Optional)– Lab 5 • Block Parts Count Reliability Estimation Slide – Lab 4 • Block Verification Plan-Results - New • Dig O-scope ePictures • Dig Photos of Prototype • Dig Photos of Laboratory Testing • Dig Videos of Laboratory Testing

9. All Components Require Some Level of DFM Justification • Passives: Resistors, Capacitors, Inductors, Thermistors • Semiconductors: Diodes, Transistors, SCRs, Triacs, Bridges, Integrated Circuits, etc • Sensors: Temp, Pressure, Humidity, Ph, Moisture, Distance, Proximity, etc • Transducers: Speakers, Microphones, Buzzers, Peizo, etc • Relays: Electro-Mech, Solid State, Reed, Latching • Motors: Drives, Solenoids, Linear Motors, Actuators • Transformers: Auto, Split, Center Tapped, Toroid, RF, Tuning • Batteries: Alkaline, NiCd, NiMH, LiIon, Pb Acid, etc • Interconnects: Wire, Connectors, Terminals, Power Plugs, Cables, Jacks, Plugs, etc • Switches: Toggle, Rocker, Momentary, Breakers, Keyboards, etc • Displays: Lamps, LEDs, Segmented Displays, LCDs, etc • Over Current Protection Devices: Fuses, Breakers, GFCI, Surge Protectors • Over Voltage Protection Devices: Diodes, Fast Clamps, Tranzorbs • Other Safety & EMC Devices: Ferrite Beads, Chokes, Line Filters, Shielding Why was this particular manufacturer’s part number picked? What are the most important part attributes and how have you guaranteed DFM?

10. Common Analog & Power Subcircuits for DFM Analysis Non-Linear Linear • Comparators • Oscillators (non-sinusoidal, square, sawtooth, etc) • Voltage Limiters and Clamps • Rectifiers and Bridges • Math Functions (multiply, divide) • Log and other Non-linear Amplifiers • Sample and Hold Amplifiers • Envelope & Peak Detectors • Phase Detectors • Phased Locked Loops • Switching Voltage Regulators • Pulse Generators, Debouncers • Multipliers, Modulators, Transmitters, Receivers • Amplifiers and Attenuators • Math Functions (add, subtract) • Oscillators (sinusoidal) • Filters • Voltage Regulators • Voltage References • Analog Drive Displays (Bulbs, LEDs, etc)

11. Common Digital Subcircuits for DFM Analysis Logic Family Based LSI & VLSI • Adders, Subtractors, Math Units • Magnitude Comparators • Encoders • Decoders • Multiplexers (Mux’s) • Demultiplexers (Dmux’s) • Code Converters • Bus Buffers • Flipflops, Latches, Latching Buffers • Counters, Timers • Pulse Generators • Optical Couplers • CPU’s & Microcontrollers • Analog-Digital Converters • Digital-Analog Converters • Prog Logic Devices, FPGAs • Sequencers • Prog Read Only Memories (Eproms, EEproms) • Random Access Memories (SRAM, DRAM) • Controllers (Serial, Drive, USB, Ethernet) • Logic Input Displays