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A Single-supply True Voltage Level Shifter

A Single-supply True Voltage Level Shifter. Rajesh Garg Gagandeep Mallarapu Sunil P. Khatri Department of Electrical and Computer Engineering, Texas A&M University, College Station, TX. Outline. Introduction Previous Work Our Approach Experimental Results Conclusions. Introduction.

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A Single-supply True Voltage Level Shifter

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  1. A Single-supply True Voltage Level Shifter Rajesh Garg Gagandeep Mallarapu Sunil P. Khatri Department of Electrical and Computer Engineering, Texas A&M University, College Station, TX

  2. Outline • Introduction • Previous Work • Our Approach • Experimental Results • Conclusions

  3. Introduction • System-on-chip and multi-core computing architectures • Increasingly used for many applications • Employ voltage scaling to meet power and energy requirements • Contain many voltage domains operating at different supply voltage levels • Different voltage domains communicate with each other • Efficient voltage level shifters (VLS) are required to interface these voltage domains • Should be fast, and also consume low power (leakage and dynamic)

  4. Introduction • Input (VDDI) and output (VDDO) domains • When VDDI > VDDO, an inverter can be used • When VDDI < VDDO, special VLS required. • In case an inverter is used, leakage may be too high. • Conventional VLS need two supply voltages • Need to route VDDI supply voltage along with signal wire • Supply wires are typically very wide • May result in routing congestion and excessive area utilization • DVS is employed to further reduce power consumption • At different times, VDDI can be greater than or less than VDDO • Conventional VLS’s need supply voltages of all input signals from different domains • Further increase area utilization and make routing more complex • We would like to address both the above issues. In other words…

  5. Introduction • Need single supply VLS’s • Perform voltage level conversions using only VDDO supply voltage • This will ease placement and as well as routing constraints • Need “true” VLS’s • The same VLS should handle the cases when VDDI < VDDO and VDDI > VDDO • Our VLS presented is this talk meets these requirements • No prior approach exist which can perform both low-to-high and high-to-low voltage level conversion using a single supply voltage

  6. Previous Work • Several previous approaches utilize dual supply voltage [ Wang et al. 2001, Tan et al. 2002] • Focused on minimizing power and energy consumption • Utilize both VDDI and VDDO supply voltages • Puri et al. 2003 proposed single supply VLS to convert low level to high voltage level • Limited range of operation due to the usage of diode-connected NMOS device to generate lower supply voltage • Leakage currents are higher when VDDO greater than VDDI + VT • Khan et al. 2006 addressed the issue of voltage range • Can perform only low to high voltage level conversion • Higher leakage currents

  7. Our Single Supply-True VLS • Convert signal level from VDDI domain to VDDO domain • Using only VDDO supply • Works for VDDI < VDDO as well as VDDI > VDDO VDDI in GND VDDI Domain VDDO node1 GND VDDO node2 GND VDDO outb GND ctrl

  8. Our Single Supply-True VLS • Maximum voltage at ctrl node • When VDDI < VDDO • When VDDI > VDDO • This means that when in = VDDI (and node2 = VDDO), M1 never turns on, for both VDDI > VDDO and VDDI < VDDO • All devices were sized to reduce leakage currents • Speed and leakage power tradeoff • All transistors except M4, M6 and M8 are nominal VT VDDI Domain Low VT device To minimize leakage current, use high VT devices

  9. Experimental Results • Implemented our SS-TVLS in PTM 90nm • Compared with a combination of Inverter and VLS of Khan et al. (Combined VLS) • Inverter is used when VDDI > VDDO • VLS of Khan et al. when VDDI < VDDO • Requires control signal to indicate whether VDDI < VDDO or VDDI > VDDO

  10. Experimental Results • Low-to-high conversion VDDI = 0.8V and VDDO = 1.2V • High-to-Low conversion VDDI = 1.2V and VDDO = 0.8V

  11. Experimental Results • Performed Monte Carlo simulations for process and temperature variations • 3s = 10% for W, L and VT and for T = 27o, 60o and 90o C • Our SS-TVLS performs correctly in all Monte Carlo simulations • Similar results are obtained for T = 60o and 90o C as well

  12. Experimental Results • Voltage translation range • Varied VDDI and VDDO from 0.8V to 1.4V in steps of 5mV • Our SS-TVLS performed efficiently for all VDDI and VDDO combinations • Performed layout of our SS-TVLS • Area is 4.47mm2 ( Width = 0.837mm and height = 5.355mm) Rising Delay Falling Delay

  13. Conclusions • Our single supply-true voltage level shifter can interface different voltage domains • Convert any voltage level to any other desired voltage level by using only VDDO supply voltage • The delay of our SS-TVLS is much lower than combined VLS • 5.5x (1.3x) lower for a rising output when VDDI< VDDO (VDDI > VDDO) • 1.5x (2.2x) lower for a falling output when VDDI< VDDO (VDDI > VDDO) • The leakage currents are also substantially lower for our SS-TVLS compared to the combined VLS • 7.5x (4.4x) lower for a high output and 19.5x (9.3x) lower for a low output when VDDI< VDDO (VDDI > VDDO) • Our SS-TVLS is also more robust to process and temperature variations

  14. THANK YOU!

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