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Learn all about Ethernet, a widely used networking protocol for communication between computers and peripherals. Discover its benefits, different versions, and how it compares to other serial interfaces.
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AX80 AX80 AX80 AX80 AY80 AY80 AY80 AY80 A3A CPU A62P ETHERNET
What is Ethernet ? • Ethernet is a trademark of Xerox Inc. • It is a networking protocol which is widely used • world-wide for communication between computers • and peripherals. • Based on the IEEE 802.3 standard • Ethernet and Cheapernet are descriptive of the • transmission and media.
What is Ethernet ? • Cheapernet • Low cost per implementation version of Ethernet. • Cost saving is realised trough the usage of cheaper • cable but has reduced communication distance. • Main appeal of Ethernet • wide availability of equipment • non manufacture specific protocol • wide user knowledge base
Ethernet Compared to other Serial I/F RS232C RS422 RS485 ETHERNET Cable Coax cable SDA RDA SDA/ RDA SDA/ 2 2 SDB RDB RDA 3 3 RDA SDA SDB/ RDB SDB/ RDB SDB RDB 7 7 SG SG SG SG Baud Rate 300-38.400 Baud 300 Baud- 1.5 mBaud 300 Baud- 12 mBaud 10/100/1000 mBaud Length 15m 100m (1.5 mBaud)- 500m (9.6 kBaud) 200m (12MBaud)- 1200m (125 kBaud) 185m (RG58), 500m (Yellow Cable) Transfer method Full Duplex Full Duplex Full Duplex (Master/ Slave) (CSMA/CD)
Specification and Settings MELSEC Ethernet module
ICMP ICMP ARP ARP Software Architecture A(1S)J71E71N Personal Computer/Workstation Programmable controller User program MELSEC A-Series PLC FROM/ TO BUFFER MEMORY Fixed Buffer Random Access Buffer Read/Write PC CPU Easy Socket TCP UDP TCP UDP IP IP ETHERNET ETHERNET 10BASE5 10BASE2 10BASET 10BASE5 10BASE2 10BASET
ICMP ICMP ARP ARP Software Architecture A(1S)J71QE71N3 Personal Computer/Workstation Programmable controller User program MELSEC QnA-Series PLC FROM/ TO BUFFER MEMORY Fixed Buffer Random Access Buffer Read/Write PC CPU Data Link Instruction MELSEC NET/10 FTP Socket TCP UDP TCP UDP IP IP ETHERNET ETHERNET 10BASE2 10BASE5 10BASET 10BASE2 10BASE5 10BASET
ICMP ICMP ARP ARP Software Architecture QJ71E71 Programmable controller Personal Computer/Workstation MELSEC Q-Series PLC User program FROM/ TO BUFFER MEMORY Random Access Buffer Read/Write PC CPU Fixed Buffer Data Link Instruction MELSEC NET/10 FTP E-Mail Socket TCP UDP TCP UDP IP IP ETHERNET ETHERNET 10 BASE 2 10 BASE 5 10/100 BASE T(X) 10 BASE 2 10 BASE 5 10/0 BASE T(X)
System Configuration A(1S)J71E71N Station with E71 Application module Number of module Remarks CPU Module A/AnN AnS/AnSH 2 Following module can be included: : A1SJ71UC24-R2 A1SJ71C24-R2 A1SJ71UC24-R4 A1SJ71C24-R4 A1SJ71UC24-PRF A1SJ71C24-PRF A1SD51S A1SJ71E71-B2/B5-S3 A1SJ71E71-B2/B5 AD51(-S3) AD51FD(-S3) AD57G(-S3) AJ71C21(-S1) AJ71C23(-S3) AJ71UC24 AJ71C24(-S3/-S6/-S8) AJ71P41 AJ71E71-S3 AJ71E71 A0J2C214-S1 GOT (with bus connection) AnA/AnU AnAS 6 QnA, QnAR QnAS MNET/10 Remote AJ72LP25 AJ72BR15 AJ72LR25 AJ72QLP25 AJ72QBR15 A1SJ72QLP25 A1SJ72QBR15 2 Not all units may be listed Please refer also to the manual !
System Configuration A(1S)J71QE71N Station with QE71 Application module Number of module CPU Module Q2ACPU(S1) Q2ASCPU(S1) Q2ASHCPU(S1) Q3ACPU Q4ACPU Q4ARCPU 4 MNET/10 Remote AJ72QLP25 AJ72QBR15 A1SJ72QLP25 A1SJ72QBR15 3
System Configuration QJ71E71 Station with QJ71E71 Application module Number of module Basic CPU Modules Q00JCPU Q00CPU Q01CPU 1 CPU Modules Q02CPU Q02HCPU Q06HCPU Q12HCPU Q25HCPU 4 MNET/10 Remote AJ72LP25 AJ72BR15 AJ72QLP25 AJ72QBR15 A1SJ72QLP25 A1SJ72QBR15 4
Specification A(1S)J71E71N and A(1S)J71QE71N Item Specification 10 BASE T 10 BASE 5 10 BASE 2 Transmission Specification Data transmission velocity 10 Mbps Transmission method Basisband Network length (m) - 2500 925 Max. segment length (m) 100 500 185 Max. number of nodes 1024 (12 pro Hub) 100/Segment 30/Segment Min. node interval -- 2.5m 0.5m Communication data storage memory Fixed buffer 2 Kbytes x 8 Random access buffer 12 Kbytes x 1 E-Mail Not available ! Cable type Twisted Pair (RJ45) Ethernet (50 Ohm) RG58 (50 Ohm) Number of inputs and outputs 32
Specification QJ71E71 Item Specification 10/100 BASE T(X) 10 BASE 5 10 BASE 2 Transmission Specification Data transmission velocity 10/100 Mbps 10 Mbps Transmission method Basisband Network length (m) -- 2500 925 Max. segment length (m) 100 500 185 Max. number of nodes 1024 (12 pro Hub) 100/Segment 30/Segment Min. node interval -- 2.5m 0.5m Communication data storage memory Fixed buffer 2 Kbytes x 16 Random access buffer 12 Kbytes x 1 E-Mail Attached File 12 Kbytes x 1 Main Text 12 Kbytes x 1 Cable type Twisted Pair (RJ45) Ethernet (50 Ohm) RG58 (50 Ohm) Number of inputs and outputs 32
C B D A E 9 F 8 0 7 1 6 2 5 3 4 Module Settings Switch Setting Item Setting Description Factory Setting SW1 Line processing selection during a TCP time-out error If a TCP time-out error occurs, line processing is selected OFF: The line is closed by the TCP time-out error ON: Even if a TCP time-out error occurs, the line is not closed. OFF SW2 Data code setting Selects the type of code for the exchanging data OFF: Binary communications ON: ASCII communications OFF SW3 Self start mode setting Selects the start method when QE71 is booted up OFF: Runs following Y19 ON: Reads the parameter in the EEPROM buffer memory OFF SW4 Unused OFF SW5 OFF SW6 OFF SW7 CPU communication timing setting When PC CPU is in the RUN state, data write enable/disable from a node is selected: OFF: Write operation disabled ON: Write operation enabled OFF SW8 Initial timing setting Selects the initial processing start up timing OFF: Quick start (start without a delay time ) ON: Normal start (starts after a delay of 20 seconds ) OFF Setting number Setting name Setting Description 0 ONLINE Communications with a node are done in the normal mode 1 OFFLINE The AJ71E71 is disconnected from the network 2 TEST 1 A self-diagnostic test is done using a self loopback test 3 TEST 2 A RAM test is carried out 4 TEST 3 A ROM test is carried out 5-F 5-F Unused
Features • Communication format TCP and UDP supported • -Selecting the format for each port • Simultaneous broadcast communication -Send one message to all connected nodes • Exchange while PLC CPU is stopped - Connection is kept open even if CPU is stopped • Exchange data code selection- Selection between ASCII and binary communication • Router relay exchange - Enables exchange of data via routers
Features • MELSECNET/10 relay exchange • - Data exchange over multiple networks when Ethernet • and MELSECNET/10 is mixed • Existence check - Checks if a remote node is still alive • Exchange error storage - Stores up to 10 sets of error history information • Self loopback test - Conducts a hardware check including QE71 transmission and reception circuits • EEPROM registration • - Stores parameters into EEPROM and boot up with them
INITIAL PROCESSING OPEN PROCESSING DATA EXCHANGE
Communication with other Nodes Setting the initial processing parameters Initial Processing Turning ON the initial request signal Setting the communication parameters Open Processing Turning ON the communication line open req. signal Data exchange Communication with fixed buffer Communication with random access buffer Read/write of data in PC CPU Data link command exchange Close Processing Turning OFF the communication line open req. signal End Processing Turning OFF the initial request signal
Initial Processing • Required for any kind of communication. • At least IP address must be set. • Default values for timers are set and can be used. • If initialisation is successful the RDY LED is blinking. • Successful initialisation can be checked by executing “PING” function.
Data for Initial Processing Buffer Memory Address IP Address (2 Words) TCP/ULP Timeout value (1 Word) TCP Zero Window Timer value (1 Word) TCP Retransmit Timer value (1 Word) TCP End Timer value (1 Word) IP Setup Timer value (1 Word) Response Monitoring Timer value (1 Word) (1 Word) Existence check Start-Timer Existence check Interval-Timer (1 Word) Number of retries for existence check (1 Word) Which Buffer are used depends on the used PLC Series !
Functionblock for Initial processing with GX IEC Dev 6.10 and A-Series
PLC Parameter Initialisation for GX IEC Dev 6.0 and QnA(S)-Series
PLC Parameter Initialisation for GX IEC Dev 6.10 and SystemQ The System Q Ethernet Modules do not have DIP switches like the A- and QnA-Series PLC‘s ! These Settings are now done by the PLC Network Parameter !
Communication Mode There are 5 basic communication modes available: • Fixed buffer exchange (with or without procedure) - No protocol communication • Random access buffer exchange - A shared memory for nodes within the network • Reading and writing data in the PC CPU- Protocol format communication • Data link command exchange • - Using sequence program data link commands • File transfer • - TCP/IP standard protocol’s FTP server functions
New Communication Modefor System Q Ethernet 1. E-Mail Function > E-Mail Ports - SMTP (outgoing mail server) - POP3 (incoming mail server) 2. Web Server Function > Only with QJ71E71-100 Ethernet Module (*1) > A PC with Web Server Software is needed > Access via Web Browser (Internet Explorer) > No additional Mitsubishi Software ( With Version „05051xxx...“ is it available for every System Q Ethernet Module ! )
Open Processing • A maximum of 8 (SystemQ 16)connections can be handled in parallel. • Active open only for fixed buffer communication. • Port no. can be used within the range from 401H to 1387H and from 138BH to FFFEH • Fixed buffer communication requires one channel for sending data and one for receiving data.
Data for Open Processing for the first 8 ports Exchange Parameter Setting Areas (64 Words) Default Values 32 Connection No. 1 Usage available settings area 0H 33 Connection No. 2 0H 34 Connection No. 3 0H (0) 35 Connection No. 4 0H (0) 36 Connection No. 5 0H (0) (1 word each) 37 Connection No. 6 0H (0) 38 Connection No. 7 0H (0) 39 Connection No. 8 0H (0) 40 E71’s Port No. Exchange address settings area 0H (0) 41 Remote node IP-address 0H (0) 42 43 Remote node port no. 0H (0) 44 (For connection no. 1 7 words) Remote node Ethernet Address (L) to (H) FFFFFFFFFFFFH (0) 45 46 E71’s Port No. Exchange address settings area Same as connection No. 1 47 to 53 (For connection no. 2 7 words) E71’s Port No. Exchange address settings area Same as connection No. 1 89 to 95 (For connection no. 8 7 words)
Usage Available Setting Areas b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 f 0 e d c 0 b a Fixed buffer usage availability: Open method setting 0: For transmission or not to perform fixed buffer exchange 00: Active open or UDP/IP 10: Unpassive open 11: Fullpassive open 1: For reception Destination existence check: Fixed buffer exchange procedure existence check 0: Does not check existence 0: With procedure 1: Without procedure 1: Check existence Pairing open setting Communication format (Protocol) settings 0: Pairing open not conducted 0: TCP/IP 1: Pairing open conducted 1: UDP/IP
Example 1: When set to “c” = “0” (Pairing open not done), is “0” (with procedure). d: 0 (TCP) d: 1 (UDP f: 00 (Active) f: 10 (Unpassive) f: 11 (Fullpassive) a: 0 (For transmission) b: 0 (Does not check) 0000H 8000H C000H 0100H b: 1 (Checks) 0002H 8002H C002H 0102H a: 1 (For Reception) b: 0 (Does not check) 0001H 8001H C001H 0101H b: 1 (Checks) 0003H 8003H C003H 0103H Example 2: When set to “c” = “0” (Pairing open not done), “e” is “1” (without procedure) d: 0 (TCP) d: 1 (UDP f: 00 (Active) f: 10 (Unpassive) f: 11 (Fullpassive) a: 0 (For transmission) b: 0 (Does not check) 0200H 8200H C200H 0300H b: 1 (Checks) 0202H 8202H C202H 0302H a: 1 (For Reception) b: 0 (Does not check) 0201H 8201H C201H 0301H b: 1 (Checks) 0203H 8203H C203H 0303H Example 3: When set to “c” = “1” (Pairing open is done), “e” is “0” (without procedure) d: 0 (TCP) d: 1 (UDP f: 00 (Active) f: 10 (Unpassive) f: 11 (Fullpassive) a: 0 (For transmission) b: 0 (Does not check) 0080H 8080H C080H 0180H b: 1 (Checks) 0082H 8082H C082H 0182H a: 1 (For Reception) b: 0 (Does not check) 0081H 8081H C081H 0181H b: 1 (Checks) 0083H 8083H C083H 0183H Example for Usage Available Setting Areas
TCP Open Processing PLC CPU PLC CPU AJ71QE71 AJ71QE71 Initial Processing Initial Processing Initial request Initial request Initial completed Initial completed Initial Completed Initial Completed Fullpassive/Unpassive open Active open Open request Open Open request wait Open completed Open end Open completed Open completed
Functionblock UDP/IP Open Processing for GX IEC Dev and A-Series
Functionblock TCP/IP Open Processing for GX IEC Dev and Q-Series
Send Data via Fixed Buffer PLC CPU Request to send signal Normal send- completed signal Writing data using a TO instruction QE71 • Initial processing completed Fixed buffer memory area • Line open processing completed Other Node
Receive Data via Fixed Buffer Other Node Read/Write Command Response QE71 • Initial processing completed Fixed buffer memory • Line open processing completed Reading data using a FROM instruction PLC CPU Receive completed signal Receive completed confirm signal
Transmission and Reception Control Methodwith Procedure local CPU Trans request To local QE71 Trans end ACK Data Response ACK remote QE71 Reccept end From remote CPU Reccept end check
Transmission and Reception Control Methodwithout Procedure local CPU Trans request To local QE71 Trans end Data ACK remote QE71 Reccept end From remote CPU Reccept end check
Fixed Buffer Communication Sample approx. update time is (Scantime x 5) + 25ms if both scan times are nearly equal ! Initialisation Initialisation Active Open Unpassive Open Send Receive
Data Read/Write in the PLC CPU PLC CPU QJ71E71 Command Response Other Node Command Response • In one PLC cycle max. 960 words ( for Q-Series; 480 with QnA and 64 with A-Series PLC’s ) can be exchanged between E71 and PLC ! • There is only a small PLC-Program in the PC CPU required ! Point:
AX80 AX80 AX80 AX80 AY80 AY80 AY80 AY80 AX80 AX80 AX80 AX80 AY80 AY80 AY80 AY80 A3A CPU A3A CPU A62P A62P A1SX80 A1SX80 A1SX80 A1SX80 A1SX80 A1SX80 A1SX80 A1SX80 A1SX80 A1SX80 A1SX80 A1SX80 A1SX80 A1SX80 A1SX80 A1SX80 A1S61P A1SCPU A1S61P A1SCPU Data Read/Write in the PLC CPU ETHERNET MELSECNET
Data Read/Write in the PLC CPU Other Node Read/Write Command Response AJ71QE71 PLC CPU 0 END 0 END 0 END END Processing* END Processing* *= max. 480 bytes
Data Read/Write in the PLC CPU MelDDE Visual Basic, C++ GX IEC Developer ETHERNET MELSECNET 10
Comparison between Modes Fixed Buffer Data Read/Write in the PC CPU • Handling of big amount of data (2000 bytes) • High transfer rate between AJ71QE71 and PLC CPU • PLC-PLC communication possible • PLC program necessary • Difficult to handle • Small PLC program • Data interpretation available • Many drivers available on PC side • PLC-PLC communication not possible • Only server functions • Transfer rate between PLC and QE71 limited and linked to PLC cycle time
Signal Direction E71 to PC CPU Signal Direction PC CPU to E71 Device No. Signal Name Device No. Signal Name X0 Transmission normal end or reception signal For connection 1 fixed buffer exchange Y0 Connection number 1 Transmission request or reception end check signal X1 Transmission error detection signal Y1 Connection number 2 X2 Transmission normal end or reception signal For connection 2 fixed buffer exchange Y2 Connection number 3 X3 Transmission error detection signal Y3 Connection number 4 X4 Transmission normal end or reception signal For connection 3 fixed buffer exchange Y4 Connection number 5 X5 Transmission error detection signal Y5 Connection number 6 X6 Transmission normal end or reception signal For connection 4 fixed buffer exchange Y6 Connection number 7 X7 Transmission error detection signal Y7 Connection number 8 X8 Transmission normal end or reception signal For connection 5 fixed buffer exchange Y8 Connection number 1 Open request signal X9 Transmission error detection signal Y9 Connection number 2 XA Transmission normal end or reception signal For connection 6 fixed buffer exchange YA Connection number 3 XB Transmission error detection signal YB Connection number 4 XC Transmission normal end or reception signal For connection 7 fixed buffer exchange YC Connection number 5 XD Transmission error detection signal YD Connection number 6 XE Transmission normal end or reception signal For connection 8 fixed buffer exchange YE Connection number 7 XF Transmission error detection signal YF Connection number 8 I/O - Signals
I/O - Signals Signal Direction E71 to PC CPU Signal Direction PC CPU to E71 Device No. Signal Name Device No. Signal Name X10 For Connection number 1 Open end signal Y10 Usage prohibited X11 For Connection number 2 Y11 X12 For Connection number 3 Y12 X13 For Connection number 4 Y13 X14 For Connection number 5 Y14 X15 For Connection number 6 Y15 X16 For Connection number 7 Y16 X17 For Connection number 8 Y17 COM.ERR LED turn off request signal X18 Open error detection signal Y18 Usage prohibited X19 Initial normal end signal Y19 Initial request signal X1A Initial error detection signal Y1A Usage prohibited X1B Usage prohibited Y1B X1C COM.ERR LED turned on signal Y1C Buffer memory channel switching ( A-Serie ) X1D Usage prohibited Y1D Usage prohibited X1E Y1E X1F WDT error detection signal Y1F
MAC (Medium Access Control) - Address (48 Bits) • World-wide unequivocally Ethernet Address • This manufacturer ID has to be bought (1000 $) from IEEE ! • (Electrical and Electronically Engineers) 47 46 45 24 23 0 Address type (reserved) Manufacturer-Identification Adapter-Identification 0H 80070H 255826H Bit 47,46 = Reserved Bit 45-24 = Manufacturer Identification = 4.194.302 different manufacturer Bit 23-0 = Adapter-Identification = 16.777.214 Adapter per manufacturer