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OS Implementation On SOPC Charcterization Presentation. Performed by: Ariel Morali Nadav Malki Supervised by: Ina Rivkin. The Project. Assemble a SOPC system, using Nios II processor on Altera’s DE2 board, based on Cyclone II FPGA. Implement Micrium’s µC OS-II.
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OS Implementation On SOPCCharcterization Presentation Performed by: Ariel Morali NadavMalki Supervised by: Ina Rivkin
The Project • Assemble a SOPC system, using Nios II processor on Altera’s DE2 board, based on Cyclone II FPGA. • Implement Micrium’s µC OS-II. • Use the system to create a web server.
Micrium’s µC OS-II MicroC/OS-II is portable, scalable, preemptive real-time operating system that has been ported and optimized to run on the Nios II processor. Thousands of people around the world are using µC/OS in all kinds of applications, such as cameras, medical instruments, musical instruments, engine controls, industrial robots, and more.
Block Diagram The following diagram describes our project:
Peripherals • Ethernet – Communication interface to the LAN. • VGA, Keyboard - I/O to monitor and config the system. • UART - Connection to the host computer. • Memories – for the use of the OS and additional programs.
Memory The DE2 board includes: • 8-MBytes SDRAM, 512K SRAM, 4-MBytes Flash • SD memory card slot The µC OS-II Kernel requires: 1-100 Kbytes depending on the features provided by the kernel.
Project Schedule Until Midterm - 17.6.09: • Learning and using Altera’s environment: Quartus II, SOPC Builder & Nios II IDE. done • Creating a small SOPC with nios II, uart and OnChip memory. In process • Learning Micrium’s µC OS-II: Blocks, implementation flow, drivers etc. until 17.6