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Lab 6 Program Control

Lab 6 Program Control. Mano & Kime Sections 7-9, 7-10, 8-1. Lab6 Fall 2002 Pcontrol. Richard E. Haskell Oakland University Rochester, MI 48309. Program Controller, Pcontrol. library IEEE; use IEEE.std_logic_1164. all ; use IEEE.std_logic_arith. all ; use work.opcodes. all ;.

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Lab 6 Program Control

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  1. Lab 6 Program Control Mano & Kime Sections 7-9, 7-10, 8-1

  2. Lab6 Fall 2002 Pcontrol Richard E. Haskell Oakland University Rochester, MI 48309

  3. Program Controller, Pcontrol library IEEE; use IEEE.std_logic_1164.all; use IEEE.std_logic_arith.all; use work.opcodes.all; opcodes package Note: working directory

  4. entity Pcontrol is port ( icode: in STD_LOGIC_VECTOR (15 downto 0); M: in STD_LOGIC_VECTOR (15 downto 0); T: in STD_LOGIC_VECTOR (15 downto 0); clr: in STD_LOGIC; clk: in STD_LOGIC; BTN4: in STD_LOGIC; fcode: out STD_LOGIC_VECTOR (5 downto 0); msel: out STD_LOGIC_VECTOR (1 downto 0); pinc: out STD_LOGIC; pload: out STD_LOGIC; tload: out STD_LOGIC; nload: out STD_LOGIC; digload: out STD_LOGIC; iload: out STD_LOGIC ); end Pcontrol;

  5. RESET constant rom: rom_array := ( JB4HI, X"0000", JB4LO, X"0002", SFETCH, digstore, JB4HI, X"0006", JB4LO, X"0008", twotimes, DUP, twotimes, twotimes, plus, digstore, JMP, X"0000", X"0000" ); X"0000" X"0000" icode PROM I reg M X“010D" fetch pinc = ‘1’ iload = ‘1’

  6. constant rom: rom_array := ( JB4HI, X"0000", JB4LO, X"0002", SFETCH, digstore, JB4HI, X"0006", JB4LO, X"0008", twotimes, DUP, twotimes, twotimes, plus, digstore, JMP, X"0000", X"0000" ); JB4HI X“010D" X”0001” icode PROM I reg M X"0000” fetch pinc = ‘1’ iload = ‘1’ Decode icode exec Don’t fetch

  7. constant rom: rom_array := ( JB4HI, X"0000", JB4LO, X"0002", SFETCH, digstore, JB4HI, X"0006", JB4LO, X"0008", twotimes, DUP, twotimes, twotimes, plus, digstore, JMP, X"0000", X"0000" ); X”0002” X“010D" icode PROM I reg M X“0109" fetch pinc = ‘1’ Iload = ‘1’ Decode icode exec Don’t fetch

  8. constant rom: rom_array := ( JB4HI, X"0000", JB4LO, X"0002", SFETCH, digstore, JB4HI, X"0006", JB4LO, X"0008", twotimes, DUP, twotimes, twotimes, plus, digstore, JMP, X"0000", X"0000" ); JB4LO X”0003” X“0109" icode PROM I reg M X"0002" fetch pinc = ‘1’ Iload = ‘1’ Decode icode exec Don’t fetch

  9. constant rom: rom_array := ( JB4HI, X"0000", JB4LO, X"0002", SFETCH, digstore, JB4HI, X"0006", JB4LO, X"0008", twotimes, DUP, twotimes, twotimes, plus, digstore, JMP, X"0000", X"0000" ); X”0004” X“0109" icode PROM I reg M X“0037" fetch pinc = ‘1’ Iload = ‘1’ Decode icode exec Don’t fetch

  10. constant rom: rom_array := ( JB4HI, X"0000", JB4LO, X"0002", SFETCH, digstore, JB4HI, X"0006", JB4LO, X"0008", twotimes, DUP, twotimes, twotimes, plus, digstore, JMP, X"0000", X"0000" ); SFETCH X”0005” X“0037" icode PROM I reg M X“0038" fetch pinc = ‘1’ Iload = ‘1’ exec_ fetch Decode icode exec Don’t fetch

  11. 3B T reg constant rom: rom_array := ( JB4HI, X"0000", JB4LO, X"0002", SFETCH, digstore, JB4HI, X"0006", JB4LO, X"0008", twotimes, DUP, twotimes, twotimes, plus, digstore, JMP, X"0000", X"0000" ); DIGSTORE X”0006” X“0038" icode PROM I reg M X"010D" fetch pinc = ‘1’ Iload = ‘1’ exec_ fetch Decode icode exec Don’t fetch

  12. 3B T reg constant rom: rom_array := ( JB4HI, X"0000", JB4LO, X"0002", SFETCH, digstore, JB4HI, X"0006", JB4LO, X"0008", twotimes, DUP, twotimes, twotimes, plus, digstore, JMP, X"0000", X"0000" ); JB4HI X”0007” X“010D" icode PROM I reg M X"0006" fetch pinc = ‘1’ Iload = ‘1’ exec_ fetch Decode icode exec Don’t fetch

  13. 3B T reg constant rom: rom_array := ( JB4HI, X"0000", JB4LO, X"0002", SFETCH, digstore, JB4HI, X"0006", JB4LO, X"0008", twotimes, DUP, twotimes, twotimes, plus, digstore, JMP, X"0000", X"0000" ); JB4HI X”0006” X“010D" icode PROM I reg M X"010D" fetch pinc = ‘1’ Iload = ‘1’ exec_ fetch Decode icode exec Don’t fetch

  14. 3B T reg constant rom: rom_array := ( JB4HI, X"0000", JB4LO, X"0002", SFETCH, digstore, JB4HI, X"0006", JB4LO, X"0008", twotimes, DUP, twotimes, twotimes, plus, digstore, JMP, X"0000", X"0000" ); JB4HI X”0007” X“010D" icode PROM I reg M X"0006" fetch pinc = ‘1’ Iload = ‘1’ exec_ fetch Decode icode exec Don’t fetch

  15. 3B T reg constant rom: rom_array := ( JB4HI, X"0000", JB4LO, X"0002", SFETCH, digstore, JB4HI, X"0006", JB4LO, X"0008", twotimes, DUP, twotimes, twotimes, plus, digstore, JMP, X"0000", X"0000" ); X”0008” X“0109" icode PROM I reg M X“0109" fetch pinc = ‘1’ Iload = ‘1’ exec_ fetch Decode icode exec Don’t fetch

  16. 3B T reg constant rom: rom_array := ( JB4HI, X"0000", JB4LO, X"0002", SFETCH, digstore, JB4HI, X"0006", JB4LO, X"0008", twotimes, DUP, twotimes, twotimes, plus, digstore, JMP, X"0000", X"0000" ); JB4LO X”0009” X“0109" icode PROM I reg M X"0008" fetch pinc = ‘1’ Iload = ‘1’ exec_ fetch Decode icode exec Don’t fetch

  17. 3B T reg constant rom: rom_array := ( JB4HI, X"0000", JB4LO, X"0002", SFETCH, digstore, JB4HI, X"0006", JB4LO, X"0008", twotimes, DUP, twotimes, twotimes, plus, digstore, JMP, X"0000", X"0000" ); X”0008” X“0109" icode PROM I reg M X“0109" fetch pinc = ‘1’ Iload = ‘1’ exec_ fetch Decode icode exec Don’t fetch

  18. 3B T reg constant rom: rom_array := ( JB4HI, X"0000", JB4LO, X"0002", SFETCH, digstore, JB4HI, X"0006", JB4LO, X"0008", twotimes, DUP, twotimes, twotimes, plus, digstore, JMP, X"0000", X"0000" ); JB4LO X”0009” X“0109" icode PROM I reg M X"0008" fetch pinc = ‘1’ Iload = ‘1’ exec_ fetch Decode icode exec Don’t fetch

  19. 3B T reg constant rom: rom_array := ( JB4HI, X"0000", JB4LO, X"0002", SFETCH, digstore, JB4HI, X"0006", JB4LO, X"0008", twotimes, DUP, twotimes, twotimes, plus, digstore, JMP, X"0000", X"0000" ); X”000A” X“0109" icode PROM I reg M X"0018" fetch pinc = ‘1’ Iload = ‘1’ exec_ fetch Decode icode exec Don’t fetch

  20. 3B T reg constant rom: rom_array := ( JB4HI, X"0000", JB4LO, X"0002", SFETCH, digstore, JB4HI, X"0006", JB4LO, X"0008", twotimes, DUP, twotimes, twotimes, plus, digstore, JMP, X"0000", X"0000" ); twotimes X”000B” X"0018" icode PROM I reg M X“0001" fetch M(8)=‘0’ M(8)=‘1’ exec_ fetch exec M(8)=‘0’ M(8)=‘1’

  21. 76 T reg constant rom: rom_array := ( JB4HI, X"0000", JB4LO, X"0002", SFETCH, digstore, JB4HI, X"0006", JB4LO, X"0008", twotimes, DUP, twotimes, twotimes, plus, digstore, JMP, X"0000", X"0000" ); DUP X”000C” X"0001" icode PROM I reg M X“0018" fetch M(8)=‘0’ M(8)=‘1’ exec_ fetch exec M(8)=‘0’ M(8)=‘1’

  22. 76 T reg constant rom: rom_array := ( JB4HI, X"0000", JB4LO, X"0002", SFETCH, digstore, JB4HI, X"0006", JB4LO, X"0008", twotimes, DUP, twotimes, twotimes, plus, digstore, JMP, X"0000", X"0000" ); 76 N reg twotimes X”000D” X"0018" icode PROM I reg M X“0018" fetch M(8)=‘0’ M(8)=‘1’ exec_ fetch exec M(8)=‘0’ M(8)=‘1’

  23. EC T reg constant rom: rom_array := ( JB4HI, X"0000", JB4LO, X"0002", SFETCH, digstore, JB4HI, X"0006", JB4LO, X"0008", twotimes, DUP, twotimes, twotimes, plus, digstore, JMP, X"0000", X"0000" ); 76 N reg twotimes X”000E” X"0018" icode PROM I reg M X“0010" fetch M(8)=‘0’ M(8)=‘1’ exec_ fetch exec M(8)=‘0’ M(8)=‘1’

  24. 1D8 T reg constant rom: rom_array := ( JB4HI, X"0000", JB4LO, X"0002", SFETCH, digstore, JB4HI, X"0006", JB4LO, X"0008", twotimes, DUP, twotimes, twotimes, plus, digstore, JMP, X"0000", X"0000" ); 76 N reg plus X”000F” X"0010" icode PROM I reg M X“0038" fetch M(8)=‘0’ M(8)=‘1’ exec_ fetch exec M(8)=‘0’ M(8)=‘1’

  25. 24E T reg constant rom: rom_array := ( JB4HI, X"0000", JB4LO, X"0002", SFETCH, digstore, JB4HI, X"0006", JB4LO, X"0008", twotimes, DUP, twotimes, twotimes, plus, digstore, JMP, X"0000", X"0000" ); 76 N reg digstore X”0010” X"0038" icode PROM I reg M X“0101" fetch M(8)=‘0’ M(8)=‘1’ exec_ fetch exec M(8)=‘0’ M(8)=‘1’

  26. 24E T reg constant rom: rom_array := ( JB4HI, X"0000", JB4LO, X"0002", SFETCH, digstore, JB4HI, X"0006", JB4LO, X"0008", twotimes, DUP, twotimes, twotimes, plus, digstore, JMP, X"0000", X"0000" ); 76 N reg JMP X”0011” X“0101" icode PROM I reg M X"0000" fetch pinc = ‘1’ Iload = ‘1’ M(8)=‘0’ M(8)=‘1’ exec_ fetch Decode icode exec Don’t fetch M(8)=‘0’ M(8)=‘1’

  27. 24E T reg constant rom: rom_array := ( JB4HI, X"0000", JB4LO, X"0002", SFETCH, digstore, JB4HI, X"0006", JB4LO, X"0008", twotimes, DUP, twotimes, twotimes, plus, digstore, JMP, X"0000", X"0000" ); 76 N reg X”0000” X“0101" icode PROM I reg M X"010D" fetch pinc = ‘1’ Iload = ‘1’ M(8)=‘0’ M(8)=‘1’ exec_ fetch Decode icode exec Don’t fetch M(8)=‘0’ M(8)=‘1’

  28. Lab6 Pcontrol ControllerMealy Machine process(current_state, icode, t, z) clr C1 C2 s(t+1) State Register M next state s(t) current state process(current_state, M) icode t z clk process(clk, clr)

  29. architecture Pcontrol_arch of Pcontrol is type state_type is (fetch, exec, exec_fetch); signal current_state, next_state: state_type; synch: process(clk, clr) begin if clr = '1' then current_state <= fetch; elsif (clk'event and clk = '1') then current_state <= next_state; endif; endprocess synch;

  30. fetch C1: process(current_state, M) begin case current_state is when fetch => if M(8) = ‘1’ then next_state <= exec; else next_state <= exec_fetch; end if; when exec_fetch => if M(8) = ‘1’ then next_state <= exec; else next_state <= exec_fetch; end if; when exec => next_state <= fetch; end case; end process C1; M(8)=‘0’ M(8)=‘1’ M(8)=‘0’ exec_ fetch exec M(8)=‘1’

  31. W8X ControllerMealy Machine process(current_state, icode, t, z) clr C1 C2 s(t+1) State Register M next state s(t) current state process(current_state, M) icode t z clk process(clk, clr)

  32. C2: process(instr, current_state, BTN4) begin alusel <= "00"; msel <= "00"; pload <= '0'; tload <= '0'; nload <= '0'; digload <= '0'; inc <= '1'; iload <= '0'; if (current_state = fetch) or (current_state = exec_fetch) then iload <= '1'; -- fetch next instruction end if; if (current_state = exec) or (current_state = exec_fetch) then case instr is when nop => null; when dup => nload <= '1'; when plus => tload <= '1';

  33. when plus1 => tload <= '1'; fcode <= icode(5 downto 0); when invert => tload <= '1'; fcode <= icode(5 downto 0); when twotimes => tload <= '1'; fcode <= icode(5 downto 0); when sfetch => tload <= '1'; msel <= "01"; when digstore => digload <= '1'; when jmp => pload <= '1'; inc <= '0'; when jb4LO => pload <= not BTN4; inc <= BTN4; when jb4HI => pload <= BTN4; inc <= not BTN4; when others => null; end case; end if; end process C2;

  34. Lab6 Fall 2002 Pcontrol Richard E. Haskell Oakland University Rochester, MI 48309

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