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Structural methods for synthesis of large specifications

Explore structural methods including Petri net theory, marking equations, invariants, ILP methods, state space challenges, and synthesis techniques for large specifications.

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Structural methods for synthesis of large specifications

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  1. Structural methods for synthesis of large specifications Thanks to Josep Carmona and Victor Khomenko

  2. Outline • Structuraltheory of Petrinets • Markingequation • Invariants • ILP methodsbasedonthemarkingequation • Detection of state encoding conflicts • Synthesis • Methods based on unfoldings

  3. State space explosion problem • Even in boundednets, thestatespace can beexponentialonthesize of the net • Concurrency (explosion of interleavings)

  4. Event-based vs. State-based model State Graph Petri Net

  5. a+ c+ a+ a- b+ b+ b- c+ c- p1 -1 0 0 0 1 -1 0 p2 1 0 -1 0 0 0 0 p3 1 -1 0 0 0 0 0 p4 0 0 0 0 0 1 -1 p5 0 0 0 -1 0 1 0 p6 0 0 1 0 -1 0 1 p7 0 1 0 1 -1 0 0 b+ a- c- b+ b- Marking equation p1 Incidence matrix p3 p4 p2 p5 p6 p7

  6. 0 0 0 0 0 1 1 1 1 1 0 0 0 0 1 0 0 0 0 0 0 a+ a- b+ b+ b- c+ c- -1 0 0 0 1 -1 0 1 0 -1 0 0 0 0 1 -1 0 0 0 0 0 0 0 0 0 0 1 -1 0 0 0 -1 0 1 0 0 0 1 0 -1 0 1 0 1 0 1 -1 0 0 Marking equation M’ = M + Ax p1 p2 p3 p4 p5 p6 p7 = + Necessary reachability condition, but not sufficient.

  7. Spurious markings

  8. Checking Unique State Coding z = {a+ b+ a- b-} x M0 M1 M2 • M1 and M2 have the same binary code (z must be a complementary set of transitions) • M1 and M2 must be different markings (they must differ in at least one place)

  9. Checking Unique State Coding z = {a+ b+ a- b-} x M0 M1 M2 ILP formulation: M1 = M0 + Ax M2 = M1 + Az bal(z) M1 M2 x, z, M1, M2 0 bal(z)  a: #(a+) - #(a-) = 0

  10. Some experiments (USC)

  11. a- QR(a-) ER(a-) a=0 a=1 QR(a+) ER(a+) a+ Checking Complete State Coding ILP formulation: M1 = M0 + Ax M2 = M1 + Az bal(z) M1 ER(a*) M2 ER(a*) x, z, M1, M2 0 n ILP problems must be solved (n is the number of transitions with label a*)

  12. Enabling conditions in ILP p1 p2 p3 p4 p5 a+ a+ M  ER(a+): M(p1)+M(p2) 2  M(p3)+M(p4)+M(p5)  3 M  ER(a+): M(p1)+M(p2) 1  M(p3)+M(p4)+M(p5)  2 (*formulation for safe nets only)

  13. Some experiments (CSC)

  14. Synthesis • Each signal can be implemented with asubset of the STG signals in the support(typically less than 10) • Synthesis of a signal: • Project the STG onto the support signals (hide the rest) • After projection, the STG still has CSC for the signal • Use state-based methods on each projection

  15. Synthesis example

  16. a- QR(a-) ER(a-) a=0 a=1 QR(a+) ER(a+) a+ Checking the support for a signal Let  be the set of signals and ’ a potential support for a. Let z’ be the projection of z onto ’. ’ is a valid support for a if the following model has no solution: ILP formulation: M1 = M0 + Ax M2 = M1 + Az bal(z’) M1 ER(a*) M2 ER(a*) x, z, M1, M2 0

  17. Algorithm to find the support z’ := {a}  {trigger signals of a}; forever z” := ILP_check_support (STG, a, z’); if z” = 0 thenreturn z’; z’ := z’  {unbalanced signals in z”}; end_forever

  18. Experiments (Support + Synthesis) CPU Literals ILP Petrify Petrify ILP • Petrify (Cortadella et al ): • State-based & technology mapping • BDD

  19. Design flow STG structural encoding remove internal signals and check CSC STG with CSC structural transformations optimized STG . . . support for z support for b support for a projection STG for a STG for b STG for z logic synthesis (petrify) circuit for a circuit for b circuit for z

  20. Synthesis example

  21. x3 x1 x2

  22. z x4 x5

  23. State encoding

  24. DTACK- DSw+ DSr+ LDS+ D+ LDTACK+ LDS+ D+ LDTACK- LDTACK+ D- DTACK+ LDS- DSr- DTACK+ D- DSw- Detection of conflicting states LDS+ LDTACK- LDS- LDTACK+ DSr+ DTACK- D+ D- DSr- DTACK+ • ILP • [Carmona & Cortadella, ICCAD’03] • SAT-UNFOLD • [Khomenko et al., Fund. Informaticae]

  25. DTACK- DSw+ DSr+ LDS+ D+ LDTACK+ LDS+ D+ LDTACK- LDTACK+ D- DTACK+ LDS- DSr- DTACK+ D- DSw- s+ s- Disambiguation by consistent signal insertion Disambiguate the conflicting states by introducing a new signal s: • STG Insertion of signal s must: • Solve conflict • Preserve consistency • Preserve persistency 10000 (CSC + consistency + persistency = SI-circuit) LDS+ LDTACK- 10100 10010 LDS- LDTACK+ 01110 DSr+ DTACK- 10110 10110 D+ D- 11111 10111 DSr- DTACK+ 01111

  26. Implicit place DEF1 (Behavior): The behavior of the net does not depend on the place. DEF2 (Petri net): it never disables the firing of a transition. y+ b+ a+ a- b- x+ y- x- x- b- y- a- a+ x+ x+ y+ b+ y-

  27. y+ x- y- b+ x- x+ b- y+ ... y+ x- y- b+ x- x+ b- y+ ... ? Consistency Consecutive firings of a signal must alternate b+ y- y+ x- y- b+ x- x+ b- y+ ... x+ x- x- b- y+

  28. y=0 y=1 Implicit Places & Consistency b+ y- x+ x- x- b- y+ Theorem (Colom et al.) Places y=0 and y=1 are implicitif and only if signal y is consistent

  29. s- s+ Disambiguation by consistent signal insertion Disambiguate the conflicting states by introducing a new signal s: • Insertion of s into the STG: • s- will precede LDS+ • s+ will precede DTACK- LDS+ LDTACK- s- ; LDS+ LDS+ LDS- LDTACK+ DSr+ DTACK- D+ D- DSr- DTACK+

  30. s=0 s=1 read cycle write cycle DSr+ DSw+ DTACK- s+;DTACK- LDS+ s-;LDS+ D+ LDTACK+ LDS+ LDTACK- D+ LDTACK+ DTACK+ D- LDS- DSr- DTACK+ D- DSw-

  31. read cycle write cycle DSr+ DSw+ s+;DTACK- s-;LDS+ D+ LDTACK+ LDS+ s=0 s=1 LDTACK- D+ LDTACK+ DTACK+ D- LDS- DSr- DTACK+ D- DSw-

  32. read cycle write cycle DSr+ DSw+ s+;DTACK- s-;LDS+ D+ LDTACK+ LDS+ s=0 s=1 LDTACK- D+ LDTACK+ DTACK+ D- LDS- DSr- DTACK+ D- DSw-

  33. read cycle write cycle DSr+ DSw+ s+;DTACK- s-;LDS+ D+ LDTACK+ LDS+ s=0 s=1 LDTACK- D+ LDTACK+ DTACK+ D- LDS- DSr- DTACK+ D- DSw-

  34. read cycle write cycle DSr+ DSw+ s+;DTACK- s-;LDS+ D+ LDTACK+ LDS+ s=0 s=1 LDTACK- D+ LDTACK+ DTACK+ D- LDS- DSr- DTACK+ D- DSw-

  35. read cycle write cycle DSr+ DSw+ s+;DTACK- s-;LDS+ D+ LDTACK+ LDS+ s=0 s=1 LDTACK- D+ LDTACK+ DTACK+ D- LDS- DSr- DTACK+ D- DSw-

  36. read cycle write cycle DSr+ DSw+ s+;DTACK- s-;LDS+ D+ LDTACK+ LDS+ s=0 s=1 LDTACK- D+ LDTACK+ DTACK+ D- LDS- DSr- DTACK+ D- DSw-

  37. read cycle write cycle DSr+ DSw+ s+;DTACK- s-;LDS+ D+ s=0 is not implicit!! LDTACK+ LDS+ s is not consistent!! s=0 s=1 LDTACK- D+ LDTACK+ DTACK+ D- LDS- DSr- DTACK+ D- DSw-

  38. read cycle write cycle DSr+ DSw+ s+;DTACK- s-;LDS+ D+ s=0is implicit s=1is implicit LDTACK+ LDS+ s=0 s=1 LDTACK- D+ LDTACK+ s is consistent DTACK+ s-;D- D- LDS- DSr- DTACK+ D- DSw-

  39. s=0 s=1 read cycle write cycle DSr+ DSw+ s+;DTACK- s-;LDS+ D+ LDTACK+ LDS+ LDTACK- D+ LDTACK+ DTACK+ s-;D- LDS- DSr- DTACK+ D- DSw-

  40. read cycle write cycle s+ DSr+ DSw+ DTACK- s- D+ LDS+ LDTACK+ LDS+ LDTACK- D+ LDTACK+ s- DTACK+ D- LDS- DSr- DTACK+ D- DSw-

  41. Main algorithm for solving CSC conflicts while CSC conflits exist do (σ1,σ2):= Find traces connecting conflict (s=0,s=1):= Find implicit places to break conflict Insert s+/s- transitions connected to (s=0) or (s=1) endwhile

  42. State space explosion problem • Goal: avoid state enumeration to check implicitness of a place. • Classical methods to avoid the explicit state space enumeration: • Linear Algebra (LP/MILP) • Graph Theory • Symbolic representation (BDDs) • Partiar order (Unfoldings) Structural methods

  43. LP model to check place implicitness A place p is implicit if the following LP model is infeasible,where P’ = P – {p}: x M0 M LP formulation: M0 + Ax = M M[P’] – F[P’,p•]·s 0 M[p] – F[p,p•]·s <0 s·1 = 1 x, M, s  0 P – {p}: p . . . M : [Silva et al.]

  44. LP model to check place implicitness A place p is implicit if M0[p] is greater than or equal to the optimal value of the following LP, where P’ = P – {p}: A place p is implicit if the following LP model is infeasible,where P’ = P – {p}: DUAL LP formulation: M0 + Ax = M M[P’] – F[P’,p•]·s 0 M[p] – F[p,p•]·s <0 s·1 = 1 x, M, s  0 LP formulation: min y· M0 y·A[P’.T] ≤ A[p,T] y· F[P’, p•] ≥ F[p, p•] y≥ 0 [Silva et al.]

  45. MILP model to insert a implicit place MILP formulation: min y· M0 y·A’[P’.T] ≤ A’[p,T] y· F’[P’, p•] ≥ F[p, p•] y≥ 0 A A’ p MILP variables: y, p

  46. MILP model to find insertion points that disambiguate the conflict MILP formulation: MILP “s=0 implicit” MILP “s=1 implicit” #(σ1,s+) = #(σ1,s-) + 1 #(σ2,s-) = #(σ2,s+) + 1 M0[s=0] + M0[s=1] = 1 LDS+ LDTACK- σ1 σ2 LDS- LDTACK+ DSr+ DTACK- D+ D- If there is a solution, rows in A’ for s=0 and s=1 describe the insertion points (arcs in the net) DSr- DTACK+

  47. petrify (state-based) MILP (structural) Number of inserted encoding signals Benchmarks from [Cortadella et al., IEEE TCAD’97]

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