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IPC DESIGNERS COUNCIL. How can we help you and your local Chapter be successful?. Agenda. IPC History Overview Designers Council History Designer Training and Certification Chapter Activities Summit, Symposiums and Conferences Future Plans. IPC HISTORY. 1957 - FOUNDED BY SIX INDEPENDENT
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IPCDESIGNERS COUNCIL How can we help you and your local Chapter be successful?
Agenda • IPC History Overview • Designers Council History • Designer Training and Certification • Chapter Activities • Summit, Symposiums and Conferences • Future Plans
IPC HISTORY 1957 - FOUNDED BY SIX INDEPENDENT BOARD FABRICATORS 1958 - USERS/SUPPLIERS MADE MEMBERS 1966 - MEMBERSHIP OFFERED TO COMPANIES OUTSIDE THE AMERICAS 1977 - IPC NAME CHANGED TO REFLECT ELECTRONIC PACKAGING AND PROGRAMMING 1986 - COOPERATIVE LIAISON WITH ANSI 1988 - COMMITTEE RESTRUCTURING 1991 - IPC DESIGNERS COUNCIL FOUNDED
IPC Present Status • REGULAR MEMBERS • TECHNICAL LIAISON MEMBERS • GOVERNMENT MEMBERS TOTAL IPC Members 2,500 + TOTAL Designers Council Members 956 +
Beginning of Designers Council • Proposed and validated during IPC-D-275 workshops in 1991 • Over 900 individuals exposed to ideas during 14 workshops • Part of IPC’s Long Range Mission statement - 1990 • Formation meeting held in Atlanta - January, 1992
DESIGNERS COUNCIL DESIGNERS COUNCIL EXECUTIVE BOARD GENERAL MEMBERS INDIVIDUAL CHAPTERS INTERNATIONAL AFFILIATIONS Designers Council Structure IPC BOD DESIGNERS COUNCIL EDUCATION COMMITTEE
DESIGNERS COUNCIL CHARTER SCOPE “TO ENCOURAGE, FACILITATE, COORDINATE AND PROMOTE THE ORDERLY INTERCHANGE AND INTEGRATION OF DESIGN CONCEPTS CONCERNING PRINTED BOARD, PRINTED BOARD ASSEMBLY, AND RELATED TECHNOLOGIES THROUGH COMMUNICATION, SEMINARS, WORKSHOPS, LOCAL, NATIONAL AND INTERNATIONAL CHAPTER PROGRAMMING AND OTHER MEANS.”
OBJECTIVES • PROMOTE AND DISSEMINATE INFORMATION REGARDING CURRENT ACTIVITIES AND NEW DEVELOPMENTS IN DESIGN TECHNOLOGY. • ENCOURAGE AND DEVELOP COORDINATED INPUT AND RESPONSE TO EXISTING AND PROPOSED DESIGN-RELATED STANDARDS AND PUBLICATIONS.
OBJECTIVES - CONT’D • ACHIEVE MAXIMUM INDUSTRY AWARENESS OF DESIGN STANDARDIZATION ISSUES IN PRINTED BOARD, PRINTED BOARD ASSEMBLY AND RELATED DESIGN TECHNOLOGIES. • ENCOURAGE AND COORDINATE THE COMPILATION OF DESIGN INFORMATION INCLUDING EQUIPMENT, EQUIPMENT CAPABILITY (TOOLS AND TECHNOLOGIES) AND RELATED INFORMATION.
OBJECTIVES - CONT’D • INCREASE INDUSTRY AWARENESS OF THE ROLE THAT THE PRINTED BOARD DESIGNERS PLAY IN THE PRODUCT DEVELOPMENT CYCLE. • ESTABLISH A FORMAL EDUCATION STRUCTURE AND CERTIFICATION PROGRAM TO ENSURE DESIGNER COMPETENCY AND CONSISTENT DESIGN STANDARDS.
OBJECTIVES - CONT’D • STIMULATE COMMUNICATION AMONG AND BETWEEN PRINTED CIRCUIT BOARD DESIGNERS AND OTHERS IN RELATED ENGINEERING DISCIPLINES.
Designers Council Networking • Local Programming – Chapter Based • National Conferences – Summit and the Designer Learning Symposiums • Designer Education Programs • IPC Standards and Services • Designer Email Forum Interchange
Internal Support Functions • Database Management • Invoicing • Website • Conferences and Symposiums • Designer Education Development and Implementation • Web Forum Monitoring • Membership Promotion
IPC Designers Council Training and Certification A program that uses industry design standards to develop a training syllabus that informs designers on the manufacturing issues of Printed Boards and electronic assemblies. (DFM and DFA).
Developed by the IPC Designers Council Educational Committee Achieve maximum awareness of the DFM and DFA issues Encourage the coordination of design standardization issues Increase designer profile elevation process Stimulate communication between and among designers Initiate a set of training modules to cover basic and focused subjects Core Module, Advanced Module, Hi-Speed, HDI, etc. Training materials - Study Guide, Industry Standards, CD-ROM Certification requires passing exam (104 multiple choice questions) Program Development
Two day training review followed by the two hour exam. Almost 3000 Designers have been certified (CID) Over 500 Designers have achieved their CID+ Trainings centers located in the US, Europe, (Scotland Netherlands, Germany) and Australia (Melbourne, Sydney) Over ten officially approved trainers Data base continuously evaluates scores and answers Focus modules being developed for 2007 Program Status
Designer Certification – CID Description & format – click here ---- High Speed & Impedance Control Focus Module Description & format ---- click here ---- Advanced Designer Certification Part 1 CID+ Description & format ---- click here ---- RF Design Principles Focus Module Description & format ---- click here ---- Advanced Designer Certification Part 2 CID++ Description & format ---- click here ---- EMI Design Focus Module Description & format ---- click here ---- The Designers Certification Program has been devised and produced by the Education Committee of the IPC Designers Council. Its purpose is to give designers, and other PCB professionals, the opportunity to gain a world wide recognised qualification based on good practice that is required to design, manufacture and test PCB’s.
Description & format Based on the leading IPC standards for PCB design, IPC Designer Certification reinforces the knowledge gained by professionals over their many years of experience and good working practices. Designers purchase the Designer Certification Kit that includes self-study materials and enrolment in a two-day IPC Designer Certification Preparation workshop. All Designer Certification testing is done at the workshop location shortly after it concludes. Individuals who do not feel prepared to take the test immediately after the training may choose to keep their exam voucher and take the test at a later date. The workshop training provides an in-depth view of the principles contained in the examination and is strongly recommended for anyone interested in obtaining the certification. Study Guide contents - click here ----
Status of Training Modules • Basic Module • Live in 1999, minor changes 2005 • Advanced One Module • Live in 2002, minor changes 2005 • High Speed, High Frequency • Objectives complete, live in 2005 • Electro Magnetic Interference (EMI) • Objectives complete, live in 2005
Original Segmentation Layout Electrical Materials Components Assembly Requirements Board Fabrication Board Physical Documentation Inspection/Testing Reliability Proposed Segmentation Basics of (HiSp)/(EMI) Electrical Requirements Board characteristics Layout Principles Components and Assy Performance Parameters Analysis and Verification Documentation To layout Principles Included where needed To Board To Performance and Analysis Proposed Segmentation is in order of lectures Module Concept Comparison
DAY 1 (DAY AND DATE) 8:00 AM REGISTRATION AND PRESESSION COFFEE BREAK 8:30 AM INTRODUCTION TO DESIGNER CERTIFICATION BASICS OF EMI 1.1 EMI-Definition & Requirements EMI-Sources & Spectra Interference Paths & Effects Product Requirements: Emission & Susceptibility Overview Tests & Limiting Values 1.2 RF/EMI- Currents Common- & Differential Mode Formation of Common Mode Currents Detection/Measurement of CM Currents Samples of CM Currents on PCB & Cables 1.3 Wave shape and Frequency (= HS-Module) Sine Wave Description Digital Pulses and Harmonics Time Domain and Fourier Spectrum; Bandwidth Clock Frequency vs. Switching Frequencies 1.4 Fundamentals of EM-Fields Parasitic Antenna in Electronic Systems Electromagnetic Fields Static Electric & Magnetic Field High frequency Fields: Near/Far Field Refreshment Break EMI Design Module Training
ELECTRICAL REQUIREMENTS 2.1 Basic Radiation Sources in Electronic Systems Magnetic Dipole - Samples & Calculations Electric Dipole - Samples & Calculations Resonances on PCB Dipole as Receiver Antenna Frequency & Radiation Spectrum of Digital Signals 2.2 Coupling Mechanism between Circuits (> Franzis-EMV) Description of TEM-Lines Capacitive Coupling - Counter Measures Galvanic-Inductive Coupling - Counter Measures (> FED 8.2.6.1) Wave Coupling - Counter Measures 2.3 Power System Design and Decoupling(FED- 3.9.1.0 and 3.9.1.2) Capacitor Selection and Decoupling (> FED 6.2.2.1)(also 5.1) Transient Suppression Use of Planes Embedded Capacitance 2.4 RF- versus DC-Ground(see also 3.2) Return Path Variation Ground Plane Stitching Split Plane Impact Power system Radiation; Fringing Lunch EMI Design Module Training
BOARD CHARACTERISTICS 3.1 Printed Circuit Boards in Principle(> Martin O'Hara "PCBSTD.doc" ) PCB Terminology Construction of a PCB PCB Design Parameters Multilayer Build (> Martin O'Hara "PCBHS.doc" Chap. 7.2 + 7.2.1) 3.2 PCB Layout for EMC Segmentation (> Martin O'Hara "PCBSTD.doc" ) Decouple Local Supplies and IC's Grounding Techniques Order of Layout Other Tracking Issues 3.3 Double-Sided Boards vs. Multilayer(to be checked against 2.3) Power/GND supply (FED 8.2.3.2 + 3.9.2 ?) Signal Return-Path EMI by Reflection and Crosstalk Controlled Impedance Effects (reflection control) 3.4 Impedance Controlled Boards(see HS-Module 3.2; shortened) Impedance Definition Microstrip and Stripline Power Supply Impedance Radiation from Power System; Shielding Refreshment Break EMI Design Module Training
LAYOUT PRINCIPLES 4.1 Single- and Double-sided Boards(> Franzis' Book Chap.4/ FED 8.1.5 + 8.1.6.1) Disturbance Currents and Paths Layout of Signal- and Power nets C-Blocking/Decoupling Radiation from Power & Signal nets Grounding to Periphery 4.2 EMI Avoidance Strategy with Multilayer I/O Segmentation; Circuit Isolation GND Plane Shielding Layout Priority Order Inductance Issues 4.3 IC and Passive Placement/ Circuit Segmentation Connector and Filter Placement Analog vs. Digital Layout High/Low Speed Zones Circuit Group Shields/Circuit Balance 4.4 Contacting of Filters & Ferrites (Periphery) Capacitors (on Board) EMI-Ferrites & Inductors Varistors; Diodes; Gas Shunts Filter Boxes; Placement & Contacting 4:30 PM QUESTIONS AND ANSWERS 5:00 PM ADJOURN EMI Design Module Training
DAY 2 (DAY AND DATE) 8:00 AM PRESESSION COFFEE BREAK 8:30 AM RECAP OF FIRST DAY COMPONENTS AND ASSEMBLY 5.1 Passive Components ( > Martin O'Hara "Passives.doc") Packaging Resistors Capacitors Inductors Transformers 5.2 Active Components( > Martin O'Hara "ICs.doc") Logic Families Principles Packaging Influence (BGA Layout Concepts?) Digital Devices Analog Devices 5.3 Connectors & Cabling Pin Assignment EMI-Connectors Shielded Cable; Transfer Impedance Cable Contacting 5.4 Housing & Mounting (Enclosure Design) Shielding Principle Materials and Coatings Opening Sizes & Form Design Rules Refreshment Break EMI Design Module Training
PERFORMANCE PARAMETERS 6.1 Drive Voltage Characteristics (proposal 2E1 DC-Group) Voltage Differences Capacitive Charge Effects Power Distribution Decoupling Character 6.2 System vs. Board Ground (proposal 2E5 DC-Group) Difference Explanation Grounding Principles Shield Effects Improvement Methods 6.3 Transient Suppression ESD EFT/Burst Surge/Lightning Voltage Surges/Drops 6.4 Costs, Availability, Lead time Multilayer vs. 2 sided Boards Influence Layer Count & Line-width Filtering & Test Efforts Time to Market Lunch EMI Design Module Training
ANALYSIS AND VERIFICATION 7.1 EMI Evaluation with SW-Tools (i.e. Expert System) Screen Room Characterization Transmission Signal Saturation Power Supplements for Leakage Testing Interpretation & Consequences 7.2 EMI Demands/Requirements - Tests(> Rainer) EMI/EMC - Standards Test Structure; Emission & Susceptibility Émission Tests (i.e. EN 55011 etc.) Susceptibility Tests (IEC 1000-4-x) 7.3 EMI-Measurements(> Rainer) Test Equipment (Overview) Emission Test Setups Susceptibility Test Setups Conformity Declaration 7.4 Assembly Analysis Verification (= HS-Module) Arrangement of Components Influence Test Circuits for Radiation Emanation Embedded Passives Ringing External Shields & Coating Refreshment Break EMI Design Module Training
DOCUMENTATION 8.1 General Documentation Practices Fabrication Master Specification Techniques Assembly Shielding Definition Requirements Grounding Description and Verification EMC Approvals and Labeling 8.2 EMI Restricting Materials & Tolerances Description of Material Properties Specification and Source Control Drawings Application Sequence Parameters Preparation and Test Method Specifications 8.3 Multilayer EMI / EMC Construction Definition of Plane Location Describing Purpose of Hole Guard Bands Random Conductor Flooding Parameters Specific EMI Prevention Stack-up Description 8.4 Board Topology Issues Component Assembly Shielding Requirements influence of Coatings and Soldermask Assembly Sequencing to Facilitate Attachment Surface Finish and Solder Joint Radiation 4:30 PM QUESTIONS AND ANSWERS 5:00 PM ADJOURN EMI Design Module Training
Topic Percent Beta X & Y X & Y Finals Sections Q&A? Q&A Need Unique/Dupe • Basics 10% 30 = (20/10) 8/4 = 20 • Electrical 15% 45 = (30/15) 12/6 = 30 • Boards 10% 30 = (20/10) 8/4 = 20 • Layout 15% 45 = (30/15) 12/6 = 30 • Assembly 10% 30 = (20/10) 8/4 = 20 • Perform. 15% 45 = (30/15) 12/6 = 30 • Analysis 15% 45 = (30/15) 12/6 = 30 • Docum. 10% 30 = (20/10) 8/4 = 20 • Totals 100% 300=(200/100) (80/40) = 200 160 + 40 = 200 Psychometric Analysis
Thirty two objectives • Two forms of tests; X and Y • Three hundred questions in the Beta • Two hundred questions needed for exams • X form 80 unique questions; 40 identical • Y form 80 unique questions; 40 identical • Applicants need to be CID minimum • Can add initials to status on Business Card • CID/H, CID/E, or CID/HE • CID+/H, CID+/E or CID+/HE New Structure Status Summary
CERTIFICATION TESTING • IPC ADMINISTERED - IN CONJUNCTION WITH TWO-DAY PREPARATION WORKSHOP - WORKSHOPS SCHEDULED IN ADVANCE • IMMEDIATE FEEDBACK - SCORED AT TEST SITE - AREA SPECIFIC DISCUSSION - PASS/FAIL RESULTS - CATEGORY ANALYSIS REPORT
Education Committee • Volunteer Group - Independent Designers - Board Manufacturers - OEM Representatives - Consultants - Representatives from Education Community
TRAINING CENTERS • PREMIER - UK • SCOTTISH ADVANCED MANUFACTURING CENTRE (SAMC) • COLLIN COUNTY COMMUNITY COLLEGE • FERRARI TECHNICAL SERVICES • EPTAC • PALOMAR COLLEGE • PIEK – NETHERLANDS • ATTEC – AUSTRALIA • SMCBA – AUSTRALIA • SKAANNING QUALITY AND CERTIFICATION • FED – GERMANY
Chapter Activity • Effective Leadership • Interesting meetings • Establish a Program Committee • Have a way for Local Networking • Invite Popular Speakers • Workshop Study Groups • Fund Raising Events
Chapter Structure and Planning • Talk to past Officers/Presidents • Pull a Chapter together • Keep focused • Create the bylaws • Keep action oriented • Anticipate some friction • Involve the group
Constructive Planning • Goals and strategies • Don’t do it alone • Make the most out of meetings • Expect long-term effort • Money is important
Introduction to Fundraising • Think outside the work place • Use the communities around you. • Choose the right fundraisers • Make the basic decisions • Plan the event • Provide the extra’s • Promote effectively
LOCAL CHAPTERS • ATLANTA • AUSTIN – HEART OF TEXAS • CASCADE (WA) • CHESAPEAKE • COLORADO • GATEWAY (MO) • GREATER BOSTON • GREATER OHIO • GREATER PHOENIX • HOUSTON • LONG ISLAND, NY • LOS ANGELES, CA • MIDWEST (MINNEAPOLIS, MN)
LOCAL CHAPTERS - CONT’D • NORTH TEXAS (DALLAS) • NORTHEAST OHIO • NORTHERN ILLINOIS • ORANGE COUNTY (CA) • PACIFIC NORTHWEST (OR) • RESEARCH TRIANGLE PARK (NC) • SAN DIEGO • SILICON VALLEY (CA) • SMOKY MOUNTAIN (TN) • SOUTHEAST MICHIGAN • SOUTHERN NEW ENGLAND (CT) • SPACE COAST (FL) • SUSQUEHANNA (NY)
INTERNATIONAL CHAPTERS • AUSTRALIA • GERMANY (FED) • CANADA - MONTREAL - OTTAWA - TORONTO • UNITED KINGDOM • IRELAND (in process) • INDIA (IPCA)