1 / 40

1CSNW1

1CSNW1. Computersystemen en Netwerken. Adrie van Doesburg Leo van Moergestel Jan Nijman  Wouter van Ooijen. Cursusinformatie. Site: https://www.sharepoint.hu.nl/cursussen/fnt/TCTF-V1CSNW1-04 http://wwwvoti.nl/hvu/V1CSNW1

robert
Download Presentation

1CSNW1

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. 1CSNW1 Computersystemen enNetwerken Adrie van Doesburg Leo van Moergestel Jan Nijman  Wouter van Ooijen

  2. Cursusinformatie • Site:https://www.sharepoint.hu.nl/cursussen/fnt/TCTF-V1CSNW1-04 http://wwwvoti.nl/hvu/V1CSNW1 • Boek:Computersystemen en embedded systemenL.J.M. van MoergestelAcademic ServiceISBN 978-90-395-2528-9

  3. CSNW1 lesprogramma Week 1: Processors, bussystemen Week 2: Dataopslag Week 3: Datacommunicatie Week 4: Computernetwerken, ISO/OSI model Week 5: Ethernet Week 6: Internet Week 7: Inleiding Operating Systems proeftentamen

  4. Computersysteem (herh.) PU(s) MEMORY I/O Adresbus databus besturingsbus

  5. Exception Cycle Von Neumann cyclus (herh.) IF ID EX

  6. 1001101101100011 Instruction register 1001001001001110 memory and I/O controle unit Registers 1001001001001110 0011100101111010 PC Stack pointer ALU Status register Von Neumann machine (herh.)

  7. Processoren

  8. Konrad Zuse's First Computer The Z1 (1936, relais) Bron: www.epemag.com/zuse

  9. Integrated circuitJack Kilby (JK-Flip/Flop) 1959, TI The Chip that Jack Built Changed the World Bron: www.ti.com/corp/docs/kilbyctr/jackbuilt.shtml

  10. Microprocessor(Intel 1971) Ted Hoff • Intel: 4004 Processor • 2300 Transistoren • 10 um technologie • 0,108 MHz Bron: /www.intel.com/museum/archives/4004.htm

  11. Core 2 Duo (Intel 2006) • Core 2 Duo • 291M transistoren • 65 nm technologie • 1-3,3 GHz Bron: www.intel.com

  12. RISC versus CISC • Complex instruction set computer (CISC): • many addressing modes; • complex operations. • Reduced instruction set computer (RISC): • load/store; • simple operations • pipelinable instructions.

  13. RISC • De instructies verrichten simpele taken • Alle instructies zijn even groot • Er is geen uitgebreide keuze aan adresseer-modes • Er zijn veel interne registers beschikbaar • Load and Store architecture

  14. Pipelining

  15. Superscalaire instructieafhandeling

  16. Super Pipelining

  17. Super Pipelining (2)

  18. Kenmerken Processoren • Architectuur • Programmeermodel • Instructieset • Technologie (fabricage)

  19. ARM Processor Architecture

  20. Core 2 Duo Architecture Bron: www.zdnet.com.au

  21. Cell Processor Architecture(Sony Playstation 3) Bron: H.P. Hofstee

  22. Programmeermodellen

  23. Instructieset (herh.) • Verplaatsing(mov, ldr, str) • Bewerking • Logisch(and, or, lsl, … ) • Rekenkundig(add, sub, mul, … ) • Sprong • Conditioneel(beq, bne, … ) • Niet conditioneel(jmp, bra, … ) • Subroutine aanroep(call, ret, …) • Speciale instructies(nop, hlt, swi, … )

  24. Bussystemen

  25. Bus hierarchie

  26. Timing: Asynchrone Bus

  27. Timing: Synchrone Bus

  28. PCI gebaseerd computersysteem

  29. PCI-bus Burst Transfer

  30. Accellerated Graphics Port (AGP)

  31. Intel PM855 Chipset Bron: www.intel.com

  32. PCI Express Based System Bron: AV Bhatt, Intel

  33. PCI Express Lanes Bron: AV Bhatt, Intel

  34. PCI Express Layers Bron: AV Bhatt, Intel

  35. USB Architectuur

  36. USB Hubs

  37. Universal Serial Bus (USB) • A Low Speed rate of 1.5 Mbits/sec that is mostly used for Human Interface Devices (HID) such as keyboards, mice and joysticks. • A Full Speed rate of 12 Mbit/s. • A Hi-Speed rate of 480 Mbit/s. • Plug and play • Hot swap • Power supply 5 V, 500 mA USB signals are transmitted on a twisted pair of data cables, labelled D+ and D−. These collectively use half-duplex differential signalling. Transmitted signal levels are 0.0–0.3 V for low and 2.8–3.6 V for high.

  38. Practicum - ZEP2 Simulator

  39. Links • CPU (Wikipedia) • Intel Processors Site • SIMD (Wikipedia) • DSP (Wikipedia) • Computer Bus (Wikipedia) • PCI-bus (Wikipedia) • PCI Express (Wikipedia) • USB in a Nutshell • Firewire (Wikipedia)

  40. Opdrachten • Bestudeer 8.1 t/m 8.3 en 8.6 • Lees PCI-express whitepaper • Maak opgaven 8.1 t/m 8.5

More Related