Proc. of the 2003 Design Automation Conference , DAC '03, June 2003, pp.318-323.

1. A transformation based algorithm for reversible logic synthesisD.M. Miller Dept. of Computer Science, Univ. of Victoria, CanadaD. Maslov and G.W. DueckFaculty of Computer Science, Univ. of New Brunswick Canada Proc. of the 2003 Design Automation Conference , DAC '03, June 2003, pp.318-323.

2. Motivation • To present a transformation based algorithm for the synthesis of reversible circuits • Power not to be dissipated in arbitrary circuits • Built from reversible gates

3. Outline • Introduction • Background • The algorithm • Template matching • Experimental results • Conclusion

4. o1 i1 i2 o2 k*k Reversiblegate i3 o3 . . . . . . . . in on Introduction • Reversible logic gate

5. Introduction • 1 x 1 reversible gate is an inverter • Classical XOR gate is irreversible • Reversible XOR gate (FG) • 2 x 2 Feynman gate: • (also called “controlled NOT” ) P = A Q = A ♁ B • if B = 0 then P= Q = A (copying gate)

6. Introduction • 3 x 3 Fredkin gate (FG) P = A Q = C ♁AB ♁AC R = B ♁AB ♁ AC

7. Introduction • 3 x 3 Toffoli gate (TG) P = A Q = B R =AB ♁ C

8. Introduction • 3 x 3 New gate P = A Q = AB ♁ C R =A’C’ ♁ B’ • Exist 40320 ( 8! ) 3x3 reversible logic gates

9. A A TG A FG B B 0 AB A♁B TG A♁B A♁B FG Cin Cin A♁B♁Cin = Sum (A♁B)Cin♁AB = Cout A fulladder using reversible gates

10. A NG A AB AB FG B (A♁B)Cin♁AB = Cout 0 (A♁B)Cin A♁B NG Cin Cin 0 A♁B♁Cin = Sum A fulladder using reversible gates

11. A NG A A♁B AB FG B 0 A♁B♁Cin = Sum TG A♁B Cin Cin AB (A♁B)Cin♁AB = Cout A fulladder using reversible gates

12. X1 X1 X1 X1 X’1 X1 X2 X2 X2 X’2 (a) X3 X’3 (b) (c) Reversible logic gates a. TOF1(x1), b. TOF2(x1,x2), c. TOF3(x1,x2, x3) Toffoli Gates.

13. Example of applying the basic algorithm

14. a a0 b b0 c c0 Circuit for the previous example

15. Example of applying the bidirectional algorithm

16. Example of applying the bidirectional algorithm

17. a a0 a a0 , b b0 b b0 c c0 c c0 A B Circuit for the function of previous example

18. 1.1 1.2 Templates 2 inputs involving SWAP

19. 2.1 2.2 Templates 2 input gate reduction no SWAP TOF2(b, a), TOF1(b), TOF1(a) replaced by TOF1(b); TOF2(b,a)

20. 3.1 3.2 3.3 Templates Using transformation rule 3 [5] reduce the no. of gates

21. 4.1 4.2 4.3 Symmetric templates reduce the no. of gates

22. 4.4 4.5 4.6 Symmetric templates (Cont.) reduce the no. of gates

23. 5.1 Templates Controlled SWAP ( Fredkin gate )

24. Interchange property Two gates in a circuit TOFk( x1, x2, … , xk – 1, xk ) and TOFl( y1, y2, … , yl – 1, yl ) adjacent can be interchanged iff xk ≠{ y1, y2, … , y l – 1 } and yl ≠ { x1, x2, … , x k – 1 }.

25. Garbage outputs required • Minimum no. of garbage outputs required is ┌ log2 q ┐ • q is maximum output pattern multiplicity of the irreversible function. • Maximum output pattern multiplicity of a multiple-output Boolean function is the maximum no. of input assignments yielding the same output pattern.

26. a b c d (constant 0) A B garbage propagate sum carry C Full adder 1 garbage output maximum output patternmultiplicity 2 Template 3.2

27. 5 inputs, 3 outputs a a’ b b’ c c’ d d’ e h0 f(=0) h1 h2 g(=0) Circuit for rd53 to get no. of 1's in the input pattern maximum output pattern multiplicity 10, 4 garbage 00000 yields 000 00100 yields 001 11111 yields 101

28. Experimental results

29. Conclusion • A simple algorithm for the synthesis of a reversible circuit composed of generalized Toffoli gates has been presented. • studying the extension of templates to n>3