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Silicon MicroStrip Detector

Silicon MicroStrip Detector. K.Kameswara Rao EHEP Group TIFR. Brief History Types of Silicon detectors Importance Principle of operation Specification of SSD Fabrication Process Mask design

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Silicon MicroStrip Detector

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  1. Silicon MicroStrip Detector K.Kameswara Rao EHEP Group TIFR

  2. Brief History • Types of Silicon detectors • Importance • Principle of operation • Specification of SSD • Fabrication Process • Mask design • Measurement setup, plots, results • DSSD • Specifications of DSSD • Principle of operation • Fabrication • Conclusion

  3. Introduction: Historical perspective • First use of silicon detectors in HEP experiments • Development of Silicon detectors started around 1950’s and the first prototype was available in the year 1960 • Precision position measurements up until 70’s done with emulsions or bubble chambers • First silicon usage for precision position measuring (late 70’s): • Why wasn’t silicon used earlier? • Needed micro-lithography technology  cost • Small signal size (need low noise amplifiers) • Needed read-out electronics miniaturization (transistors, ICs) Silicon detectors have become a essential part of HEP experiments needing high spatial resolution for charged particle tracking information.

  4. Introduction: Historical perspective • Next generation of collider experiments pushing the limits of the technology • High radiation environment prevent usage of gas detectors near interaction point (r<1m) • New developments in radiation-hard silicon and electronics allow use of silicon strip devices for r>5cm • Silicon pixel devices to be used for r<5cm HEP silicon detector technology has greatly benefited from the revolutionary progress in the microelectronics industry (large area silicon wafer processing, CMOS devices, radiation hard processes, high density interconnects...) Different detectors at collider point

  5. Indian effort in High tech Silicon Microstrip detector • For the first time truly Microstrip detector has been developed in India for high spatial resolution charged particle tracking. • TIFR is the first to develop the Silicon Microstrip detector in association with Bharat Electronics Limited, Bangalore • Main Features of the Detector : Minimum Strip width of 12microns and strip pitch of 65microns for about 7.4cms long on a 4” silicon wafer. AC coupling, Common Bias via Polyresistor High value of resistance (1.5M to 3.5Mohms ) achieved within less than 500microns of length and width of 30 to 60microns

  6. Introduction: Types of silicon detectors • Strip devices • High precision (< 5m) 1-D coordinate measurement • Large active area (up to 10cm x 10cm from 6” wafers) • Single-sided devices • 2nd coordinate possible (double-sided devices) • Most widely used silicon detector in HEP • Pixel devices • True 2-D measurement (20m pixel size) • Small areas but best for high track density environment • Pad devices (“big pixels or wide strips”) • Pre-shower and calorimeters • Drift devices strip pixel/pad drift

  7. Why silicon • Low ionization energy ( good signal ) • Long mean free path ( good charge collection efficiency ) • High mobility ( fast charge collection ) • Low multiple scattering • Little cooling required

  8. Construction of detector • Geometrical shape • Thickness • Read-out and implant pitch • p or n bulk silicon, resistivity • Sensor design choices Sensor design vary due to physics requirements • single-sided or double-sided • Biasing structure • AC or DC coupling • Double-metal read-out In many cases there are conflicting design trade-offs between these choices. Choice Pro Con Double-sided sensor Less material for two read-out coordinates Processing cost about 3x that for single-sided Multiple scattering and material budget are more 500m thickness More signal

  9. Silicon strip devices: Principle of operation Although many of the concepts apply to all 4 types of silicon devices, we will concentrate primarily on silicon strip devices. • Basic motivation: charged particle position measurement • Use ionization signal left behind by charged particle passage _ + _ + _ + _ + • Use the drift chamber analogy: ionization produces electron-ion pairs, use an electric field to drift the electrons and ions to the oppositely charged electrodes. • In a solid semiconductor, ionization produces electrons-hole pairs. For Si need 3.6 eV to produce one e-h pair. In pure Si, e-h pairs quickly recombine  need to drift the charges to electrodes … but how?

  10. Principle of operation p n • p-n junction When brought together to form a junction, there appears a gradient of electron and hole densities resulting in a diffusive migration of majority carriers across the junction. The migration leaves a region of net charge of opposite sign on each side, called the space-charge region or depletion region (depleted of charge carriers). The electric field set up in the region prevents further migration of carriers.    – –  + – – – + + + + + +   – +  + – – + + + + + – Space charge density Electric field

  11. p p p n Principle of operation • p-n junction (diode) - continued • In the depletion region, e-h pairs won’t as easily recombine but will drift away from each other due to the field. • If we make the p-n junction at the surface of a silicon wafer with the bulk being n-type (you could also do it the opposite way), we then need to extend the depletion region throughout the n bulk to get maximum charge collection. • This can be achieved by applying a reverse bias voltage. Remember, this is a diode, a forward bias would result in current flow. h+ e-

  12. Principle of operation • Properties of the depletion zone • Depletion width is a function of the bulk resistivity , charge carrier mobility  and the magnitude of the reverse bias voltage Vb: Depletion zone w – d Vb + undepleted zone w = 2Vb where  = 1/qN for doped materiel and N is the doping concentration (q is always the charge of the electron) • The voltage needed to completely deplete a device of thickness d is called the depletion voltage, Vd Vd =d2 / (2) • Thus one needs a higher voltage to fully deplete a low resistivity material. • One also sees that a higher voltage is needed for a p-type bulk since the carrier mobility of holes is lower than for electrons (450 vs 1350 cm2/ V·s)

  13. Principle of operation • Properties of the depletion zone (cont) • The capacitance is simply the parallel plate capacity of the depletion zone. One normally measures the depletion behaviour (finds the depletion voltage) by measuring the capacitance versus reverse bias voltage. C = A  / 2Vb capacitance vs voltage

  14. Principle of operation • Charge collection • Need to isolate strips from each other and collect/measure charge on each strip  high impedance bias connection (resistor or equivalent) • Usually want to AC couple input amplifier to avoid large DC input currents • Both of these structures are often integrated directly on the silicon sensor. Bias resistors via deposition of doped polysilicon, and capacitors via metal readout lines over the implants but separated by an insulating dielectric layer (SiO2). – h+ e- + Minimum ionizing particle generates approximately 23000 electron – hole pairs in 300micron silicon detector

  15. Specifications for Single Sided Silicon Detector • Wafer : n type Silicon, 4inch Diameter, 300 micron thickness, FZ type • Orientation : <111> • Resistivity : 5 Kohm-cm • No. Of Independent sets of detectors : 11 • Type of implantation for strips : p+ • No. strips per set : 32 • Polysilicon resistor value: 2 to 4 Megaohms • Dark Current ( at 100V reverse voltage ) max : 5 Microamps

  16. Silicon Micostrip P+ Implant Details Set No. Strip length (um) width(um) Pitch(um) No. of strips 1 74734 12 65 32 2 74734 48 73 32 3 74734 12 80 32 4 74734 20 80 32 5 74734 35 80 30 6 74734 25 100 32 7 74734 35 100 32 8 74734 25 120 32 9 74734 35 120 32 10 74734 48 120 30 11 74734 25 135 32

  17. P+ implantation energy dose : 80KeV • P+ implantation depth : 3.9 microns • Capacitor layer thickness : 0.4 microns • Ohmic side N+ layer thickness : 2 microns • Polysilicon 25 loops , thickness 6 microns and height varies from 30 to 60 microns

  18. Steps of fabrication process • Wafer processing Start with n-doped silicon wafer,  ≈ 1-10 kcm 1) n-Si SiO2 Oxidation at 800 - 1200C 2) Photolithography (= mask align + photo-resist layer + developing) followed by etching to make windows 3) etch UV light mask Photo-resist

  19. Steps of Sensor fabrication • Wafer processing B Doping by ion implantation (or by diffusion) 4) P 5) Annealing at 600 C p+ p+ n+ Al 6) Photolithography followed by Al metallization over implanted strips and over backplane usually by evaporation.  Most simple DC-coupled silicon strip detector

  20. Sensor fabrication • Wafer processing: integrated AC coupling capacitors In many cases, cannot tolerate DC currents into read-out amplifier, so a series AC coupling capacitor is needed. Need a large capacitance so as not to lose the small signal charge (need >100pF), but often have very little space. AC-coupled polysilicon resistor biased sensor Use sandwich of aluminium strip over oxide layer over p-strip to make the capacitor. It turns out that an oxide thickness of 0.1-0.2m is required. Same technique can be used on backside of double-sided device. Al read-out strip Controlled oxide thickness p+ n+ Problem: very difficult to make perfect oxide insulator over such a large surface. Most common defects are called “pinholes”, a short (or low resistive connection) through the oxide. By putting an additional very thin layer of silicon nitride (Si3N4) this problem can be overcome.

  21. Guard ring / Passivation / Capacitive coupling • Guard Ring : It is an additional junction that isolates the main junction from the edge of the wafer to avoid the breakdown ,which can be caused by the increased depletion voltage after irradiation. • Passivation : To protect the semiconductor surface from electrical and chemical contaminants • Capacitive coupling : Eliminates the problem of electrical readout saturation caused by strips

  22. Silicon Microstrip Detector Solid work package Cadense full development version software

  23. One of the Set

  24. MASK DESIGNS Mask 1 : p+ Mask 5 : Opening Contacts over dc pad, bias pad Mask2 : Capacitor (Sio2)Mask 6 : Metal Mask3 : Polycontact opening Mask 7 : Protective layer Mask4 : Polyresistor

  25. Actual Silicon Microstrip Detector Geometry : 76mm * 47mm

  26. SILICON MICROSTRIP DETECTOR Dc pad Bias pad Ac pad Poly resister

  27. Source - measure unit Keithley 237 LCR Meter HP4284A Probe station ( inside) PC running With labview

  28. LabView : • It is a graphical programming language that uses icons to create applications. Labview programs are called virtual instruments because their appearance and operation imitate physical instruments • User interface is build by using set of tools and objects and it is known as front panel • The graphical source codes are then added using graphical representations of functions to control the front panel objects. The Block diagram contains this code. • It is integrated fully for communication with hardware such as GPIB,VXI,PXI,RS-232 • It gives the flexibility and performance of a powerful programming language • NI - GPIB • The General Purpose Bus Interface that can connect up to 15 devices to one • controller. Keithley 237 Source Measure unit : • It sources voltage while measuring current or sources current while measuring voltage • It can be used as DC source or meter, sweep source , or source – measure unit • Source capabilities +/-100micovolts to +/- 1100V, Measure : 10fA to 10mA HP4284A LCR meter : • It measures Resistance , Capacitance , Inductance and other parameters . • Capacitance Range : 0.01fF to 9.99F • Resistance : 0.01mohms to 99.99Mohms , Inductance : 0.01nH to 99.9kH

  29. Manual Probe Station inside the Black Box Karl Suss PM 8

  30. Silicon Detector Probing

  31. 2) Bulk capacitance setup 1) Total leakage current setup Bias pad Keithley 237 Bias pad Keithley 237 Back plane Back plane Bias pad Plot HP4284 LCR Meter Plot Back plane 3) Poly silicon setup 4) Total capacitance Bias pad Keithley 237 Bias pad Keithley 237 Dc pad Back plane Plot Plot AC pad HP 4284 LCR Meter Back plane 5) Pin hole setup 6) coupling capacitance R = 10M AC pad Keithley 237 Bias pad Keithley 237 DC pad Back plane Plot Plot AC pad HP 4284 LCR Meter Measurement setup DC pad

  32. Double Sided Silicon Detector Advantages : Two dimensional positional information Development of DSSD is highly complex and challenging task. It needs various major Processes involved a) Design of P side detector b) Design of N side detector c) Polysilicon and capacitor processes d) Design of necessary patterns for double sided integration e) Double level metallisation

  33. TIFR DSSD Specifications Wafer crystal orientation < 100 > Type : FZ Resistivity 5k to 10kΩ Breakdown voltage > 300v Full Depletion voltage ( V fd ) < 100 v Wafer thickness 300microns Polysilicon resistor value 4MΩ to 10MΩ Total Dark current maximum <= 2microamps @ 100V reverse voltage Dead strip fraction < 1% on both sides N Side Number of strips/ Ac pads / dc pads 512 ; Coupling capacitance = 90pf Bias ring material ohmic ( n+ ) Guard ring material p+ Pitch 50 ; width 50 * 512 = 25600 ; Total width = 28400 N+ strip width 12 P stop width 7 ; strip separation type = Atoll P Side Number of strips / Ac pads / dc pads 1024 ; Coupling capacitance = 160pf Bias ring material p+ P+ strip Width 50 ; length 75 * 1024 = 76800 ; Total length = 79600 Pitch 75 Note : All dimensions are in μm

  34. DSSD P Side N sub pad Bias pad P + DC pad AC pad TIFR DSSD

  35. DSSD P Side via 2nd metal 1st metal Sio2 P+ N- bulk TIFR DSSD

  36. Bias opening Dc pad AC pad N - Side N+ Bias ring P+ AC Pad Guard ring TIFR DSSD N sub pad

  37. p p p n Principle of operation Obvious question: why not get a 2nd coordinate by measuring the position of the (electron) charge collected on the opposite face? • Double-sided detectors • This is possible and is often done but is not as simple as it might seem. • Problem: unlike the face with the p-strips, nothing prevents charge to spread horizontally on the back face. To make good electrical contact, one usually makes the back surface even more highly doped n-type than the bulk. Then one puts an aluminium layer on top of that to give an assured low resistance contact. By make highly doped n-type strips rather than a uniform surface, and making the electrical contact to these strips, one can make the field lines go to the strips, hence localize the charge. The n-strips are usually oriented orthogonal to the p-strips to get the optimum 2nd coordinate. However, in some cases a non-orthogonal stereo angle is used.

  38. n n n n n n n-bulk p+ p+ Principle of operation p+ p+ p+ • Double-sided detectors (cont) n-bulk n-strips alone are still not sufficient to isolate the charge due to an electron accumulation layer effect. This effect is due to the presence of electrons at the Si-SiO2 layer between the n-strips (even if one avoids putting an oxide layer there, one would form on its own if exposed to air). The electrons accumulate at this surface since they are the majority carriers. In general one puts an oxide over the silicon between strips in order to passivate (protect) the surface. To “break” the accumulation layer one can: Highly doped regions are usually denoted with a + superscript. • Put p-strips in between the n-strips.

  39. Double sided Silicon detector

  40. Sensor fabrication • Wafer processing: double-sided sensors n+ n+ n+ For double-sided devices, “back” side must also be polished. Implant n+ strips instead of full backplane. 7) p+ p+ Add p+ “blocking” strips (they often don’t need any biasing connection). Note the many extra photolithographic steps needed. 8) Al 9) Al metallization over implanted back-side read-out strips.

  41. Conclusions • Very challenging high tech area • High spatial resolution tracking detectors never build earlier within India • Industry participation is very important • Silicon Microstrip detectors are being developed for BELLE detector upgrade in the high luminosity phase • Developing inhouse capabilities for future participation where high resolution tracking is involved-SLHC,ILC,FAIR .. Silicon detectors remain an exciting and interesting field of development and application for high energy physics experiments.

  42. Silicon Detector Team Tariq Aziz S.R.Chendvankar Mrs.Mandakini.R.Patil K.Kameswara Rao Y.P.Prabhakara Rao P.Shankarnarayanan Miss.Rejeena Rani Bharat Electronics limited Bangalore

  43. Application of Silicon Detectors • Nuclear Physics • Crystallography • Medicine for Imaging purpose

  44. BEL Clean Room Details • Lithography : Class 100 • Diffusion : Class 1000 • Processed Wafer testing : Class 10000 • Class “ X ” means , “ X “ particles per cubic feet of size 0.5 micron or less

  45. Charge Collection : The average energy loss in silicon is about 280 eV/micron The energy lost by a particle which is passing through a 300 micron thick silicon is about 84KeV ( This value is calculated from the Bethe-Bloch Formula, used to give a description of the energy loss for the charged Particles ) The average energy needed to create an electron – hole pair is 3.6eV Number of electron – hole pairs that are set free = 84keV / 3.6 = 22600 The charge freed by passing on one ionizing particle through the silicon Detector is MIP ( minimum ionizing particle )= 22600 * e = 3.6fc

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