340 likes | 595 Views
Michael Reibel Boesen 1 , Didier Keymeulen 2 , Jan Madsen 1 , Thomas Lu 2 , Tien-Hsin Chao 2 1 : Technical University of Denmark 2 : NASA Jet Propulsion Laboratory November 3rd, 2010.
E N D
Michael Reibel Boesen1, Didier Keymeulen2, Jan Madsen1, Thomas Lu2, Tien-Hsin Chao21: Technical University of Denmark2: NASA Jet Propulsion LaboratoryNovember 3rd, 2010 Integration of the Self-Healing eDNA Architecture in an Embedded System and Evaluation of it Using a Fourier Transform Spectrometer Instrument Application
Big picture eDNA: Self-healing hardware arch. DTU Informatics Michael, Jan Madsen, Pascal Schleuniger Fast design and impl. using CompactRIO for space instruments Greg Flesch (JPL) Didier Keymeulen (JPL) CompactRIO PowerPC, 800MHz, VxWorks Ramp FFT AVG FPGA Virtex5 40MHz clock DAQ Tunable Laser Spectrometer (MSL) DAC Analog output Analog input ADC Liquid Crystal Waveguide-based Fourier Transform Spectrometer Tien-Hsin Chao (JPL) Thomas Lu (JPL) Scott Davis (Vescent Photonics) George Farca (Vescent Photonics)
Motivation:Why Self-healing in Fourier Transform Spectrometer • Harsh environment increases probability of permanent & transient faults • Fault in control: Cause damage of instrument • Fault in data processing: Loss of vital science data • Repairs impossible, high risk or very expensive • Need for autonomous hardware self-healing
Agenda • eDNA: Self-healing hardware architecture • Case study application: Fourier Transform Spectrometer • Hardware/software implementation & CompactRIO • Self-healing of FTS: Control & data processing • Performance evaluation
eDNA architecture overview A B 00101 01001 00110 eDNA prog. Ribosomal DNA Load S0,00 Jump Z, SP Load S0,01 Control Layer μP 32 Computational granule RAM 32 eCell eCell eCell Computation layer eCell eCell eCell eCell eCell eCell NA NA NA Communication layer Pkg in Pkg out NA NA NA NA NA NA
eDNA Compiler while (b != 0) do if (b<a)then a = a – b else b = b – a endif endwhile • Placement • Functionality • Communication • AlleCells havecopy => Completely distributedarchitecture Map 2 1 Trans-lation Genome 1 eDNA program Genome 2 Placement 1 Genome 3 Func. while Genome 4 Encoding 4 Comm 3 4 exp exp 2 Comm. type Comm. target if
eDNA Self-reconfiguration • Addr relate to ID • ID relate to Genome • No genome => spare (1,3) (2,3) (3,3) (1,2) (2,2) (3,2) P P P P P P P P Genome 1 1 1 1 1 1 1 1 1 (1,1) (2,1) (3,1) Genome 2 2 2 2 2 2 2 2 2 3 3 3 3 3 3 3 3 Genome 3 4 4 4 4 4 4 4 4 Genome 4 P 1 Pkg in NA NA NA 2 Pkg out 3 4 NA NA NA NA NA NA
eDNA Self-healing • Fault-detection: TMR-based algorithm: Cell C and spare detects fault at Cell F • Spare localization: Cell C locates closest spare-cell K • Self-reconfiguration: Broadcast table update • Effects: Function & Communication restoration and Isolation of faulty cell • Functionality restoration: “Moved” to (3,1): • Communication restoration: Now going to (3,1) instead of (1,1) • Isolation: No one communicates with (1,1) (3,1) Self-healed Pre-fault 1 1 1 1 1 1 1 1 1 Genome 1 P P P Genome 2 2 2 2 2 2 2 2 2 2 P P P 3 3 3 3 3 3 3 3 3 Genome 3 4 4 4 4 4 4 4 4 4 Genome 4 (1,3) (2,3) (3,3) P P P (1,2) (2,2) (3,2) (1,1) (2,1) (3,1)
Self-healing hardware eDNA: Prototype Hardware Architecture B A • IF/WHILE • <= • != • EXPR • + • - • * • Shift • etc. Network Adapter + Store and forward state machine To other eCells registers 8-bit identifier NA+ SAF A L U eDNA RAM 32 8-bit address Z sw sw NxM-bit data 32 ALUop M N Gene RAM Pico-Blaze Ribosome DNA RAM
Case study:Liquid Crystal Waveguide-based Fourier Transform Spectrometer • No moving parts Change OPD by changing voltage on electrodes Gas Ramp Data Acquisition Averaging FFT Prototype: SLD: 1450-1700nm, Resolution: 3-4nm
Fourier Transform Spectrometer HW/SW Integration on CompactRIO Platform • HW: Real-time embedded controller architecture (CompactRIO) consisting of • PowerPC at 800MHz running VxWorks • Xilinx V5-LX110 FPGA • Analog input module • Analog output module • High-level SW tool support: LabVIEW • FPGA synthesis: Graphical programming language • Integration of VHDL code • Integration of I/O • Very fast path-to-flight • Design, test & prototype with hardware-in-the-loop (TRL 0-5) • Straight to deploy/flight: Using Honeywell hardware (TRL 6-9)
Self-healing hardware for FTSIntegration of eDNA onto CompactRIO (1) Developer level XML VHDL Descr. LabVIEW CLIP Top Level VHDL File • LabVIEW FPGA • Component Level • IP Node eDNA VHDL code - Virtex 5 Integration in LabVIEW as regular I/O
Self-healing hardware for FTSFTS data processing and control on eDNA • SW Toolkit: Simulation, optimization and compilation env. Sim eDNA Ramp Download Translate Write AVG FFT
Self-healing hardware for FTSeDNA performance evaluation • Focus • eDNA Execution time vs. LabVIEW FPGA impl. • Self-healing time • Execution time before and after healing • Note: No TMR fault detection yet
Self-healing hardware for FTSeDNA performance evaluation • eDNA signals that an error occurred • Data removed from dataset • Advanced TMR-based protocol in-the-works • Fairness of comparison? • eDNA: FPGA type platform on top of FPGA • FPGA-based prototype: What we have right now
Self-healing hardware for FTSeDNA performance evaluation (1,3) (2,3) (3,3) (1,3) (2,3) (3,3) Autonomous (1,2) (2,2) (3,2) (1,2) (2,2) (3,2) (1,1) (2,1) (3,1) (1,1) (2,1) (3,1)
Self-healing hardware for FTSeDNA performance evaluationDepends on cell placement (1,3) (2,3) (3,3) (1,3) (2,3) (3,3) Autonomous (1,2) (2,2) (3,2) (1,2) (2,2) (3,2) (1,1) (2,1) (3,1) (1,1) (2,1) (3,1)
DCT/FFT results • FFT implemented using FFT.VI in LabVIEW • eDNA DCT
Conclusion (1) • eDNA self-healing architecture demonstrated in real world application • Fast integration of eDNA architecture into embedded real-time system • Data processing and control functionality of FTS compiled into eDNA code
Conclusion (2) • Autonomous self-healing functionality comes at a high-cost • Future improvements to eDNA • Reduce immense communication overhead between cells in eDNA architecture • Replace 8-bit Xilinx PicoBlaze with ASIP • HW implementation of fault-detection mechanism • Self-healing time: A fraction of execution time
Michael Reibel Boesen mrb@imm.dtu.dk THANK YOU FOR YOUR TIME! Q&A
References • eDNA architecture: • Michael R. Boesen, Jan Madsen - eDNA: A Bio-Inspired Reconfigurable Hardware Cell Architecture Supporting Self-organisation and Self-healing, NASA/ESA Adaptive Hardware Systems (AHS’09) 2009, San Francisco. • Michael R. Boesen, Pascal Schleuniger, Jan Madsen - Feasibility Study of a Self-healing Hardware Platform, Applied Reconfigurable Computing Conference (ARC’10), Bangkok. • LCW-FTS: • Chao, T., Lu, T., Davis, S. R., Rommel, S. D., Farca, G., Luey, B., Martin, A. and Anderson, Michael: Compact Liquid Crystal Waveguide Based Fourier Transform Spectrometer for In-Situ and Remote Gas and Chemical Sensing, Society of Photographic Instrumentation Engineers (SPIE) 2008. • Chao, T: Electro-Optic Imaging Fourier Transform Spectrometer, IEEE Aerospace Conference 2007. • Tunable Laser Spectrometer for MSL • Flesch, G. and Keymeulen, D.: Adaptive Control of Tunable Laser Spectrometers for Space Flight Applications, IEEE Aerospace 2010, Big Sky. • Flesch, G. and Keymeulen, D.: Adaptive Embedded System applied to Tunable Laser Spectrometers for Space Flight Applications, NASA/ESA Adaptive Hardware Systems (AHS’10), Anaheim.
Fault detection slide 1 1 Primary genes while while 3 3 4 4 2 2 1 exp exp exp exp 2 2 Secondary genes 1 if if while • Protocol: • 2nd start => do 2nd gene • 1st start => • Check that result from package == 2nd gene result • If not, send test package to nearest spare cell • Spare cell is now tester and voter in TMR system • Inconsistency = fault! 4
Path-to-flight Design, Prototype & Test with hardware in the loop [HIL] Deploy/flight Deploy on Honeywell RDE TRL : 6 - 9 Design, prototype & test TRL : 0 - 5
Self-healing hardware eDNA: Design Methodology (1/2)Compilation Technique 1 while 3 4 exp exp while (b != 0) do if (b<a) then a = a – b else b = b – a endif endwhile start start start 2 start B A Bool if while BOOL do S end while Bool if BOOL then S1 else S2 end if Parallel S1 end Parallel Parallel S2 end Parallel S1 S1 EXPR. Z = A expr B S2 S1 finish Z finish S finish finish finish
FTS HW/SW integrationMapping of components PowerPC, 800MHz, VxWorks FFT FPGA Virtex5 40MHz clock Ramp DAQ AVG DAC Analog output Analog input ADC
Self-healing hardware eDNA: Design Methodology (1/2)Compilation Technique 1 1 while while 3 3 4 4 exp exp exp exp while (b != 0) do if (b<a) then a = a – b else b = b – a endif endwhile start start start 2 2 start B A Bool if if while BOOL do S end while Bool if BOOL then S1 else S2 end if Parallel S1 end Parallel Parallel S2 end Parallel S1 S1 EXPR. Z = A expr B S2 S1 finish Z finish S finish finish finish
Self-healing hardware eDNA: ASIC implementation • Aimed at ASIC implementation featuring • Distributed TMR-based Fault Detection protocol • Dedicated eCell processor design • Why ASIC not FPGA? • Cell CPU - PicoBlaze main bottleneck[ARC’10] • Need dedicated design for speed • Higher logical granulation needed • Communication penalty
Case-study application:Fourier Transform Spectrometer • Purpose: Spectral detection of gases • Michelson Interferometer Design Gas FFT FFT
Application of Self-healing hardware: eDNALCW-FTS – Liquid Crystal Waveguide Fourier Transform Spectrometer • No moving parts Gas