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Night Vision

Team Bender. Night Vision. James Stacy Brian Herre Maurio Grando Eric Faller Chris Bawiec. James. Hardware High Level Design. James. Completed Goals. HC11 wired up and executing commands via EPROM SRAM written to and verified Latch and Bus drivers wired up

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Night Vision

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  1. Team Bender Night Vision James Stacy Brian Herre Maurio Grando Eric Faller Chris Bawiec James

  2. Hardware High Level Design James

  3. Completed Goals • HC11 wired up and executing commands via EPROM • SRAM written to and verified • Latch and Bus drivers wired up • Schematics drawn to present stage in design • Most parts have been acquired James

  4. uProcessor, Bus Driver, and Latch Maurio

  5. Control Logic, EPROM, and SRAM Maurio

  6. Optics • Cell Phone Camera Lens • Size and Shape same for our CCD • Focal length and lens are perfect • Probably has filter to eliminate IR • Can be used for testing CCD output • Alternate lens idea: • Used lens • Definitely passes IR radiation • Need to figure out focal length for CCD size Maurio

  7. CCD Maurio

  8. Suggested Wiring/Drivers Maurio

  9. Input Waveforms Brian

  10. Output Waveforms • Max Freq. 12.5 MHz • Conforms to RS-170 black and white TV (30frames/sec) Brian

  11. VGA logic Interface to RAM FPGA Video logic 8-bit pixel data Current Row & Column Xilinx VGA module VGA data Brian

  12. Software Processes • Three main software programs: • Boot monitor • Camera operating system • Computer interface program Eric

  13. Boot Monitor • Stored in ROM • First thing that runs when HC11 is reset • Provides simple interface via RS-232: • Upload new OS software into RAM • Run basic tests • Inputs: OS software, test commands • Outputs: Running software, test results Eric

  14. Camera OS • Stored in RAM during development • Can be burned into ROM when finished • Multiple interfaces: • Camera logic • Computer • Shuffles data around • Does not compute anything Eric

  15. OS–Logic interface • Interfaces with the FPGA to take a picture and get the image data • Inputs: • Image Data • Outputs: • Control signals to disable frame updates Eric

  16. OS-Computer interface • Interfaces with PC workstation via custom serial protocol • Protocol is very simple • Commands processed serially • No need for multiple threads or interrupts • Inputs: • “Take picture” command • Outputs: • Image data in predefined RAW format Eric

  17. Computer software • Provides the UI for the camera • Allows user to interact with boot monitor and OS • Displays captured images • Saves images as JPEG files Eric

  18. Computer Software Mock-up Chris

  19. FPGA-VGA and Control logic Eric, James CCD – Lens Brian, Maurio RS-232 communication James, Chris Software Programming Eric, Chris Schematics Chris Interfacing FPGA and CCD Eric, Maurio RAM Maurio, Brian Division of Labor Chris

  20. Parts list • uProcessor (MC68HC11E) • Latch (74HC373) • Bus Driver (74HC245A) • EPROM (AT29C256) • SRAM (HM62256) • 512k SRAM (K6T4008C1B) • CCD (TC237B) • FPGA (XCS10) • VGA Port • Serial Port • Clock (8 MHz) • ADC (AD976A) • FPGA EPROM Chris

  21. Schedule Chris

  22. Questions ?

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