1 / 27

Computer Architecture & Operations I

Instructor: Yaohang Li. Computer Architecture & Operations I. Review. Last Class Memory This Class MIPS Instruction Set Next Class Midterm I. Hexadecimal. Base 16 Compact representation of bit strings 4 bits per hex digit. Example: eca8 6420 1110 1100 1010 1000 0110 0100 0010 0000.

seaver
Download Presentation

Computer Architecture & Operations I

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. Instructor: Yaohang Li Computer Architecture & Operations I

  2. Review • Last Class • Memory • This Class • MIPS • Instruction Set • Next Class • Midterm I

  3. Hexadecimal • Base 16 • Compact representation of bit strings • 4 bits per hex digit • Example: eca8 6420 • 1110 1100 1010 1000 0110 0100 0010 0000

  4. Instruction Set • Instructions • Program commands that a computer can understand • Instruction Set • The repertoire of instructions of a computer • Different computers have different instruction sets • But with many aspects in common

  5. CISC and RISC • CISC (complex instruction set computer) • VAX, Intel X86, IBM 360/370, etc. • RISC (reduced instruction set computer) • MIPS, DEC Alpha, SUN Sparc, IBM RS6000

  6. Top 10 x86 Instructions

  7. CISC and RISC Today • Boundaries have blurred • Modern CPUs utilize features of both

  8. Stored-Program Concept • Stored-Program Concept • Instructions and data of many types can be stored in memory as numbers

  9. The MIPS Instruction Set • Used as the example throughout the book • Stanford MIPS commercialized by MIPS Technologies (www.mips.com) • Large share of embedded core market • Applications in consumer electronics, network/storage equipment, cameras, printers, … • Power consumption • Heat dissipation

  10. Arithmetic Operations • Add and subtract, three operands • Two sources and one destination add a, b, c # a gets b + c • All arithmetic operations have this form §2.2 Operations of the Computer Hardware

  11. ISA Design Principle 1: Simplicity favors regularity • Simplicity favors regularity • Regularity makes implementation simpler • Simplicity enables higher performance at lower cost

  12. Arithmetic Example • C code: f = (g + h) - (i + j); • Compiled MIPS code: add t0, g, h # temp t0 = g + hadd t1, i, j # temp t1 = i + jsub f, t0, t1 # f = t0 - t1

  13. More Arithmetic Example • C code: f = g + h + i + j + k; • Compiled MIPS code: add t0, g, h # temp t0 = g + hadd t1, t0, i # temp t1 = t0 + iadd t2, t1, j # temp t2 = t1 + jadd f, t2, k # f = t2 + k Do we really need three registers?

  14. Register Operands • Arithmetic instructions use registeroperands • MIPS has a 32 × 32-bit register file • Use for frequently accessed data • Numbered 0 to 31 • 32-bit data called a “word” • Assembler names • $t0, $t1, …, $t9 for temporary values • $s0, $s1, …, $s7 for saved variables §2.3 Operands of the Computer Hardware

  15. ISA Design Principle 2: Smaller is faster • Design Principle 2: Smaller is faster • c.f. main memory: millions of locations

  16. Register Operand Example • C code: f = (g + h) - (i + j); • f, …, j in $s0, …, $s4 • Compiled MIPS code: add $t0, $s1, $s2add $t1, $s3, $s4sub $s0, $t0, $t1

  17. Memory Operands • Main memory used for composite data • Arrays, structures, dynamic data • To apply arithmetic operations • Load values from memory into registers • Store result from register to memory • Memory is byte addressed • Each address identifies an 8-bit byte • Words are aligned in memory • Address must be a multiple of 4

  18. Format Value Little-Endian 00000000 00000001 Big-Endian 00000001 00000000 Byte Ordering • Little-endian byte order • With the low-order byte at the starting address • Example: Intel, DEC • Big-endian byte order • With the high-order byte at the starting address • Example: HP, IBM, Motorola 68000 • Internet standard byte ordering • Formatting of the decimal value 256 in little-endian and big-endian

  19. Big Endian and Little Endian • MIPS is Big Endian • Most-significant byte at least address of a word • c.f. Little Endian: least-significant byte at least address

  20. Memory Operand Example 1 • C code: g = h + A[8]; • g in $s1, h in $s2, base address of A in $s3 • Compiled MIPS code: • Index 8 requires offset of 32 • 4 bytes per word lw $t0, 32($s3) # load wordadd $s1, $s2, $t0 offset base register

  21. Memory Operand Example 2 • C code: A[12] = h + A[8]; • h in $s2, base address of A in $s3 • Compiled MIPS code: • Index 8 requires offset of 32 lw $t0, 32($s3) # load wordadd $t0, $s2, $t0sw $t0, 48($s3) # store word

  22. Registers vs. Memory • Registers are faster to access than memory • Operating on memory data requires loads and stores • More instructions to be executed • Compiler must use registers for variables as much as possible • Only spill to memory for less frequently used variables • Register optimization is important!

  23. Immediate Operands • Constant data specified in an instruction addi $s3, $s3, 4 • No subtract immediate instruction • Just use a negative constant addi $s2, $s1, -1

  24. Design Principle 3 • Make the common case fast • Small constants are common • Immediate operand avoids a load instruction

  25. The Constant Zero • MIPS register 0 ($zero) is the constant 0 • Cannot be overwritten • Useful for common operations • E.g., move between registers add $t2, $s1, $zero

  26. Summary • Instruction and Instruction Set • CISC and RISC • MIPS • Arithmetic Operations • Register Operands • Memory Operands • Immediate Operands • Constant Zero

  27. What I want you to do • Review Chapter 2

More Related