Jim Hutchby - Facilitating San Francisco Marriott Hotel 55 Fourth Street, San Francisco, CA

1. ITRS/ERD ITWGEmerging Research Devices Work GroupWorkshopMaturity Evaluation for Selected Beyond CMOS Emerging Technologies Jim Hutchby - Facilitating San Francisco Marriott Hotel 55 Fourth Street, San Francisco, CA Nob Hill D Room Yerba Buena Level Saturday, July 12 8:00 a.m. – 10:00 p.m

2. Workshop (For each of the seven technologies) Receive expert inputs on the seven technologies for future information processing (pro & con) Clarify status, potential, and remaining challenges Formulate discussion/decision points to be considered in the Sunday ERD/TWG meeting Consider if one or more of the seven candidate technologies is ready for enhanced engineering development and detailed roadmapping (Sunday) Objectives

3. Workshop (For each of the seven technologies) Invitation to Sunday’s ERD WG Meeting Questions today are for clarification – any debate is reserved for Sunday’s meeting. Please give me a copy of each proponent and friendly critic presentation today. Discuss “Beyond CMOS” Information

4. “Beyond CMOS” Definition “Beyond CMOS” refers to emerging research devices, focused on a “new switch*” used to process information, typically exploiting a new state variable to provide functional scaling substantially beyond that attainable by ultimately scaled CMOS. Substantial scaling beyond CMOS is defined in terms of functional density, increased performance, dramatically reduced power, etc. Examples of Beyond CMOS include: a) molecular electronic devices, b) spin-based transistors and devices, c) ferromagnetic logic, etc. *The “New Switch” refers to an “information processing element or technology”, which is associated with compatible storage or memory and interconnect functions.

5. Proposed device technology (device, physics, interconnect, input/output functions) “Beyond CMOS” technologies that extend the functional scaling of CMOS beyond that attainable with dimensional scaling Device technologies that provide a new “Beyond CMOS” paradigm for highly scalable information processing Scaling potential (device or functional density) compared to ultimately scaled CMOS) Geometric (size, density, etc.) Dissipated power density (dynamic, static, …) Information Requested (1/2)

6. Projected performance (power, speed, gain, throughput per Joule, etc. …) at maturity Reduction to practice - status Demonstration of “proof-of-concept” of device, unit cell and functional circuit Fabrication technology – challenges Progress in past four years Current state-of-the-art using the provided metrics as a guide (Appendix 2 of request for white papers) Key scientific and technological issues remaining to accept the technology for manufacture. Technology roadmap outlining a 5-15 year develop path leading to manufacture in 5-10 years. Information Requested (2/2)

7. 8:00 Welcome and Introductions Hutchby 8:10 Background, Workshop & ERD Meeting Objectives Hutchby 8:20 NEMS Switch Technology Proponent Presentation (40 minutes) Akarvardar Friendly Critic Presentation (20 minutes) Elata Discussion for clarification (20 minutes) 9:40 Spin Torque Transfer Technology Proponent Presentation (40 minutes) Allen Friendly Critic Presentation (20 minutes) Yablonovitch Discussion for Clarification (20 minutes) 11:00 Break 11:20 Carbon-based Nanoelectronics Proponent Presentation (40 minutes) Kim Friendly Critic Presentation (20 minutes) Javey Discussion for Clarification (20 minutes) 12:40 Lunch (Working) “Beyond CMOS” Technology Maturity WorkshopAgenda – Saturday, July 12

8. 1:10 Atomic Switch / Electrochemical Metal Switch Proponent Presentation (40 minutes) Kuekes Friendly Critic Presentation (20 minutes) Chen Discussion for Clarification (20 minutes) 2:30 Collective Spin Devices (including M-QCA) Proponent Presentation (40 minutes) Wang Friendly Critic Presentation (20 minutes) Bandyopadhyay Discussion for Clarification (20 minutes 3:50 Break 4:10 Single Electron Transistors Proponent Presentation (40 minutes) Fujiwara Friendly Critic Presentation (20 minutes) Likharev Discussion for Clarification (20 minutes) 5:30 CMOL and FPNI Proponent Presentation (40 minutes) Likharev Friendly Critic Presentation (20 minutes) DeHon Discussion for Clarification (20 minutes) 6:50 Dinner Break (Return @ 8:00 p.m.) “Beyond CMOS” Technology Maturity WorkshopAgenda – Saturday, July 12 (Cont’d)

9. 8:00 Summary Session – introduction & Objective Hutchby 8:10 NEMS Switch Franzon 8:25 Spin Transfer Torque Bourianoff 8:40 Carbon-based Nanoelectronics Brillouet 8:55 Atomic Switch / Electrochemical Metal Switch Haensch 9:10 Collective Spin Devices (including M-QCA) Shankar 9:25 Single Electron Transistors Hiramoto 9:40 CMOL and FPNI DeBenedictis 10:00 Adjourn * Volunteer Discussion Leaders Needed “Beyond CMOS” Technology Maturity WorkshopAgenda – Saturday, July 12 (Cont’d)

10. Pros Subthresh slope << 60 mV/dec Substantial power reduction – lower Vdd & little static power Logic functions ~ 1 delay time Complementary devices to replace n- and p-MOSFETS NEM-FET dynamic Vth device Fab process comp w/ CMOS Low cost substrates Radiation hard operation Cons Slow delay time > 1 ns High oscillatory pull out time High pull in voltage Charge based switch w/ parasitics NEM-FET is still a FET NEM-FET not demonstrated Limited scaling potential Stiction issues Controlled variability Hermetic packaging required Summary – NEMS Switch

11. Pros Single device can be a NVM and a NV logic device Intimately integrate logic w/ memory Distribution of clock using Spin Torque Transfer Nano Oscillator Cons Potential not well known Dynamic power dissipation? Rather slow switching speed Logic device very difficult – not yet demonstrated STT RAM not demonstrated Summary – Spin Torque Transfer Switch

12. Pros Hi channel mobility Amenable surround gate Semiconductor & metal Low Cg Low Vdd S < 60mV/decade Low switch energy Cons Control of growth Bipolar inject - Schottky S/D Need large array of CNTs to obtain large Ids Hi contact resistance Summary – Carbon Based Electronics - CNT

13. Pros Excellent FET Properties Linear dispersion offers new devices Long MFP & quantum coherence lengths Bandgap function of bias and ribbon width Cons No viable growth process Control ribbon edge struct Contact resistance Mobility decreases a lot with smaller ribbon width Band-to-band tunneling at Eg = 400 meV New devices need manipulation of ES potent Summary – Carbon Based Electronics - Graphene

14. Pros Based on ion motion Compatible with CMOS & CMOL/FPNI Relatively simple process tech Cons Only proof-of-concept Two terminal device No intrinsic gain Potential for logic unknown Switching time slow ~ 10ns Scaling limited by random diffusion of ions Little info on switch energy Low power operation a challenge Fluctuation of switching parameters Summary – Atomic Switch/Electrochemical Metal Switch

15. Pros Spin wave transport Large reduced variability Lower power dissipation Majority gate – Few devices Logic gate demonstrated Cons Slow – 107 cm/sec Huge – mm size gates Large dampening – poor interconnect Limited by coulomb input & output coupling Summary – Collective Spin Switch

16. Pros Very high speed ~ 1THz Very small – high density Very low Cg Low power dissipation Two apps – voltage state logic & charge state logic Offers unique functionalities e.g., NDR, … Cons Low gain Low output current due to high Rt Low fanout Variable Vth Low immunity to noise Fab is immature – control & stability issues Need to integrate with CMOS Still based on charge as state variable Need fault tolerant circuits Summary – SET/SED Switch

17. Pros Connect RRAM with CMOS using crosspoint architecture Not sensitive to alignment accuracy Can be used for logic. FPNI being developed by HP and Juliet/Aachen U. Cons Very difficult fab process (CMOL) CMOL not demonstrated Summary – CMOL/FPNI Technology