TLSI’s Integrated Circuit Replacement Program

1. TLSI’s Integrated Circuit Replacement Program COMPANY PRIVATE

2. TLSI Reverse Engineering & Emulation (TREE) Process TLSI’s Answer to IC and ASIC Obsolescence in Military & Aerospace Systems COMPANY PRIVATE

3. TREE offers… The End of Obsolescence as we know it. COMPANY PRIVATE

4. Good Candidates for TREE • Analog IC’s and Custom Analog ASICs • Digital IC’s and Custom Digital ASICs (<350K gates) • Mixed-Signal IC’s and Custom Mixed-Signal ASICs • FPGAs & PLDs • Processes: CMOS, BiCMOS, BiPolar, DMOS, SiGe • Feature Sizes: 0.25µ to 5.0µ COMPANY PRIVATE

5. Poor Candidates for TREE • Digital IC’s and Custom Digital ASICs (>350K gates) • Rad Hard IC’s and Custom Rad Hard ASICs • Large Memory IC’s • MMIC’s, Microwave • Processes: GaAs, MESFET, PHEMT, GaInP HBT COMPANY PRIVATE

6. The TLSI Advantage • Never experience obsolescence for ANY device supplied by TLSI • Low up-front engineering fees (NRE’s) • Low overall cost compared to other solutions • Aggressive lead-times • Small minimum order quantities • Minimum 20 year guaranteed source of supply • Dedicated to supporting Military/Aerospace market • Plastic or ceramic (hermetic) packaging options • Dual Source – true second source capability • Over 25 years in business • System level design expertise COMPANY PRIVATE

7. Advantages of TREE Process • “Form/Fit/Function” replacements for obsolete devices • Integration of additional features for value engineering initiatives • Minimum 20 year guaranteed source of supply • Low risk approach • Not limited to one process technology • Domestic foundries & packaging houses meet CONUS • Access to “Sunset Technology” processes (~2.0µ+) • Flip-chip or solder-bumped die • ISO 9001, BAEB, MIL-M-38510, etc. COMPANY PRIVATE

8. TREE Process Candidates • “FPGA to ASIC” conversions • “ASIC to ASIC” conversions • “Obsolete IC to ASIC” conversions COMPANY PRIVATE

9. Basic Steps of TREE Process • Obtain IC samples, schematics & other documentation (if available) • Decapsulate and selectively etch to the desired metal and silicon layers • Photograph each die layer using high magnification photography • Examine all metal and silicon layers of the IC under a high-power microscope • Use in conjunction with the enlarged photographs to reconstruct the circuit topology and interconnects • Extract & document schematic drawing from actual IC circuits and interconnects COMPANY PRIVATE

10. Basic Steps of TREE Process • Simulate Cells, Macro Cells & Top Level Circuits over the Process, Temperature and Supply Limit Specifications • Physical Layout of New Device • Layout vs. Schematic & Design Rule Checks • Wafer Fab and Prototype Assembly • Migrate Test Program to the Final Electrical Tester Family used to Qualify Original Silicon • Verify Test Program & Test Bed with “Golden Units” (from original production lots) • Evaluate Prototypes against Original IC Samples & Test Programs • Ship to Customer for Evaluation in System COMPANY PRIVATE

11. TREE Process Details • Removing Encapsulation Material • Techniques for Removing Circuit Layers • Microsectioning • Imaging • Probing • Extracting Circuit & Creating Schematic Drawing • Simulating & Comparing Layout vs. Schematic • Wafer Fab and Prototype Assembly • TLSI & Customer Evaluation of Prototypes COMPANY PRIVATE

12. TREE Process Details • Removing Encapsulation Material • Nitric or Sulfuric Acid • Removing Layers of Silicon • (e.g., glassivation, metallization, oxide) • Wet Etching, Dry Etching, Focus Ion Beam (FIB) COMPANY PRIVATE

13. TREE Process Details • Imaging • Bright field illumination, metallic contrast imaging • High-resolution x-ray microscope • Scanning electron microscope • Scanning acoustic microscope • Stereo and optical research microscope • Dual-Beam FIB • Probing • Mechanical and electron beam probing COMPANY PRIVATE

14. TREE Process Details • Extracting Circuit & Creating Schematic Drawing • Simulating & Comparing Layout vs. Schematic • Latest technology simulation and characterization software • Wafer Fab and Prototype Assembly • Various domestic foundries & packaging houses • TLSI & Customer Evaluation of Prototypes • Internal electrical & environmental test / screening facility COMPANY PRIVATE

15. As suppliers exit the Military IC market, TLSI is continuing to strengthen its commitment to the military/aerospace contractors. For those programs that do not require MIL-PRF-38534 or MIL-PRF–38535 compliant devices, TLSI offers production units processed to our standard extended temperature (-40°C to +85°C or –55°C to +125°C) processing flow. Subcontractors fully compliant with: MIL-STD-883, method 5004 & 5005 (screening) MIL-PRF-38534 (MCM’s) MIL-PRF-38535 (monolithics) MIL-I-45208 (inspection) MIL-Q-9858A (quality) MIL-SID-45662 (inspection & calibration) MIL-M-38510 (general spec) COMPANY PRIVATE

16. TLSI… • Supports 5V supply voltage technology. • In most cases, produces the new device using the same technology • and fabrication process as the original device. • Provides long term source of supply (minimum 20 years) • Provides a Form, Fit and Function equivalent device. • Offers multiple foundry options for same device. • Offers US based foundries and packaging houses (CONUS) • Prevents expensive board or system redesign. • Uses the latest technologies and software to characterize the • obsolete component. • Has a long heritage of supporting military programs and • customers. • Offers die banking services. • Supports low volume requirements. COMPANY PRIVATE

17. TLSI is your Solution for Obsolete and Discontinued IC’s We offer two options for Form, Fit & Function IC’s… • 1. Repackage existing die obtained from obsoleted wafers • 2. Design, develop and package replacement die COMPANY PRIVATE

18. DMSMS – Diminishing Manufacturing Sources & Material Shortages DMSMS is a problem for many military systems and customers… TLSI is the only “one-stop” solution. COMPANY PRIVATE

19. For More Information Please Contact: Jim Kaya Sr. Director of Sales TLSI, Inc. Phone: 631-465-1145 E-mail: kaya@tlsi.com www.tlsi.com COMPANY PRIVATE