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Weekly Project Update WODY Group Class Project. Fall 2000 ECE 6276. ISA for Motion Compensation. For non-parallel instructions, op code is five bits First bit is always zero for non-parallel operations If second and third bits are “00”, then the instruction is either a load or store
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Weekly Project UpdateWODY GroupClass Project Fall 2000 ECE 6276
ISA for Motion Compensation • For non-parallel instructions, op code is five bits • First bit is always zero for non-parallel operations • If second and third bits are “00”, then the instruction is either a load or store • If second and third bits are “01”, then the instruction is a branch • If second bit is “1”, then the instruction is an ALU operation • Remaining bits determines which type of functional instruction
ISA for Motion Compensation • For parallel instructions, op code is three bits • First bit is always one for parallel operations • Remaining bits determines which type of functional instruction
ISA for Motion Compensation • Example
ISA for VLD, inverse zig-zag, inverse quantization • After examination of code, determined no need for embedded parallelism in ISA. • Based on DLX formatting • Three type of instructions • R-type • I-type • J-type
ISA for Inverse DCT • For non-parallel instruction, op code is six bits • First bit always one for non-parallel instructions • Next two bits specify which function unit • “00” – Add/Sub • “01” – Multiply • “10” – ALU (Load, store, branch, jump) • “11” – Shift • Fourth bit specifies if immediate type of instructionor a similar, alternate instruction • Remaining bits specify type of operation byfunction unit
ISA for Inverse DCT • For parallel instructions, op code is six bits • First bit is always one for parallel operations • Remaining bits determines which type of functional instruction
ISA for Inverse DCT • Example