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Signal Integrity Simulation

Signal Integrity Simulation. and high-speed ASICs. David Porret PH/ESE/ME ESE Group Seminar 15/2/2011. Outline. The GBT SerDes ASIC The problem Building models Checking models Some results Conclusions. On-Detector Custom Electronics & Packaging Radiation Hard. Off-Detector

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Signal Integrity Simulation

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  1. Signal Integrity Simulation and high-speed ASICs David Porret PH/ESE/ME ESE Group Seminar 15/2/2011

  2. Outline • The GBT SerDes ASIC • The problem • Building models • Checking models • Some results • Conclusions

  3. On-Detector Custom Electronics & Packaging Radiation Hard Off-Detector Commercial Off-The-Shelf (COTS) Custom Protocol The GBT Project • Part of the Versatile Link project : Gigabit optical link for the LHC detectors. • Actually testing first version of the ASIC : GBT SerDes,4.8 Gb/s serializer / deserializer.

  4. The GBT SerDes ASIC = 130 nm CMOS technology 4x4 mm silicon die 12x12 mm 121 pins BGA Package “open”

  5. The problem (1) • Conclusions from the TWEPP 2010 presentation • Almost all of the functions proved 100% functional (…) • For the De-serializer • The clock recovery function works fine over the full range • However, error free data reception at 4.8 Gb/s has not (yet?) been achieved! • OK up to 2.4 Gb/s

  6. The problem (2) BGA Package Silicon Die Rx Termination Tx Diff. Pair 4.8 Gb/s Frame Probe Effect ? Test board ? Package ? Chip Design ? Rx Diff. Pair Optical TRX SFP

  7. Building models SIwave (2.5D) SIwave HFSS (3D) S Parameters Equivalent circuit S Parameters Spice Netlist SIwave S Parameters HSpiceNetlist Ansoft Designer

  8. Full Setup in simulator

  9. Checking models (1) Unpopulated board Frequency domain simulation Dielectric losses Measurement (yellow) and simulation (blue) with 100 ohms termination at the BGA pads

  10. Checking models(2)Full Setup Probe is at the receiver termination , ≈ 3.5 mm from the input buffer. Measurement (yellow) and Simulation (Brown).

  11. Checking models(3)TDR ns Probe removed Multiples comparisons show same behaviour but different absolute values

  12. Conclusions on models • With experience models could be better. • 3D EM models are more accurate but the simulator runs all the night and (good) results are not always there. 2,5D solver is a good compromise. • The main error source is the interconnections between models. Always check model physical boundaries and frequency domain. • Effects of solder joints ?

  13. Checking the probe effect Probe (gray) No Probe (blue)

  14. “Virtual Probing” 1Gbps 3.2Gbps 4.8Gbps Termination Rx Input buffer

  15. Improving the package Dark blue = original design Move the termination close to the input buffer

  16. Conclusions (1)For our problem • Probing at the termination is misleading, the signals at the input buffer are not that bad. • But things can be improved : • around the MECT connector on the testboard. (for future layout). • in the package by moving the termination and optimizing the layout. • Linear frequency domain simulation shows package resonances ?

  17. Conclusions(2)SI tools • Much easier with CERN recently acquired software (Ansoft Designer + SIWave). • Well integrated in Cadence. • What-if simulations. • De-embedding of VNA measurements. • Also Power Integrity and EMC features, optimize decoupling.

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